The heart of this transceiver is an ATmega128 microcontroller (MCU). It controls the vast majority of functions within the radio. E. g.: Frequency generation of the 2 DDS systems, audio tone and AGC decay time, T/R-switching, the presets for transmitter gain on the 6 bands independently, display and panel lights etc. etc.
And, due to usage of a parallel interface for the LCD (8 data lines and 4 control lines) an MCU with sufficient ports had to be used.
First I started with the SPI version of the LCD (ILI9341). This LCD has a high resolution of 240×320 dots. Driven by a relatively slow 8-bit controller like an AVR and the LCD driven in serial mode the performance was inferior.
Next I found that the same LCD is also available with a parallel interface. Then called CP11003. This one uses 12 lines (8 data and 4 control lines minimum), which made it mandatory to use an ATMega128 controller. To enhance speed and performance this one is clocked by a 16 MHz crystal. A touchpad is also integrated, but not used in my application.
Source code in C programming language can be downloaded from Github.
The two DDS oscillators are mounted to the side of the cabinet. They are sited close to the microcontroller board to keep leads short.
Right on the left you can see the small dual-tone oscillator for testing and tuning. Next is the AD9834-equipped local oscillator (LO), centered the AD9951 that serves as the VFO. Right the ATmega128, mounted to a 64 lead breakout board can bee spotted behind the varios cables going to and from this section.
The Dual-Tone Oscillator
This one consists of two simple phase-shift audio oscillators. I have introduced this circuit a longer time ago for testing purposes here in this blog.
The capacitors and resistors in the phase-shifting chain have been chosen to put the two different frequencies to values of about 700Hz and 1900Hz, thus they are not harmonically related. A variable resistors allows the user to set the balance between the two signals so that they are equal in voltage.
Two transistors (a PNP-NPN pair) are switched by Pin PB7 from the microcontroller. There is a respective function in the software that activates the transmitter together with this oscillator for comfortable tuning and testing.
The Local Oscillator (LO)
This one again uses the “good old” AD9834, overclocked to 100MHz. I found that some chips from the “grey market” have problems when being overclocked and therefore produce spurious signals. In case this occurs, it is recommended to step back to the clock frequency of 75 MHz which is high enough for the purpose of the LO.
The oscillator comes with an balun output transformer (will reduce spurs!) and a low-pass filter plus a simple amplifier. The latter basically is not necessary because the LO will only have to drive the inputs of SA602 integrated mixer circuits (200mV RMS) used as SSB generator and rx demodulator. I had another mixer type in mind before, that one needed higher voltage. Thus the coupling to PIN6 of SA602 is only via 5.6pF capacitor to avoid overdriving the mixer and improve signal purity. This will be shown later when we are about to discuss receiver and transmitter circuitry.
Here the AD9951 DDS again comes to operation. This one has got a 14-bit DAC which makes it less prone for spurious signals. The clock rate has been pushed to the limit of 400MHz which, according to datasheet, is the max. clock rate for this DDS module.
You can download a datasheet of a suitable clock oscillator. This device is very small but it can be soldered to a 2 by 2 hole piece of veroboard and then mounted to a piece of headerstrip by soldering wires to the underside of the board:
A voltage divider will reduce the 3.3 V to 1.7V that is acceptable for the clock input of the AD9951 chip.
The DDS circuit is common for frequent readers of this blog:
The low pass filter has been left out because when examining the output signal of the DDS it turned out to contain only very little quantum of harmonics. The max. frequency of this VFO will be 29.7 MHz + 9MHz which equals to 38,7 MHz.
An SSB radio for the HF bands will be presented. Featuring 12 to 20 Watts of output power (depending on DC supply), full DDS frequency generation, covering 6 major frequency bands (1.8, 3.5, 7, 14, 21 and 28 MHz) within the short wave amateur radio spectrum. The rig also features colored LCD and front panel backlight.
In this upcoming series of articles a relatively complex project will be discussed. It is some sort of „remake“ of my last multi-band QRP SSB transceiver that has been entitled the „Gimme Five“-Transceiver and that was finished in 2015. „5“ in that case stands for the 5 major (i. e. „classical“) RF bands: 80m, 40, 20m, 15m and 10m the radio covered. This new project (called the „Midi6“, because it is not a “Micro” or a “Mini” transceiver 😉 ) covers one band more, the range has been extended to 160m.
The basic features of this construction are:
Dual DDS frequency generation (AD9951 as VFO, AD9834 as LO),
Colored LCD (CP11003) with resolution 240×320 pixels,
Single conversion superhet receiver, interfrequency 9 MHz,
5 stage high quality transmitter, Pout=20W (max. at 15V DC) , featuring a microcontroller driven regulated gain stage to ensure absolute constant output on all bands,
Integrated 2-tone oscillator for testing and tuning,
Front panel full backlight.
“Experimental radio” means that there is enough space inside the cabinet to change boards and test new ideas in the same space. Also certain components like the SSB-filter have been made as “plug-in” components to enable quick change of the part. Also the connector between the various transmitter and receiver stages have been done by “jumpers” and header strips so that resistors and capacitors can be changed quickly to experiment with other values.
The radio has been realized with standard veroboards (0.1″ pitch), SMD components and been put into a homemade aluminum cabinet using 2 layer sandwich construction inside the cabinet.
Here a snapshot of the operational transceiver. Cabinet size, by the way, is 7.5 x 16.5 x 19.5 centimeters (2.95 x 6.5 x 7.68 inches). These dimensions are in the range of other multiband QRP transceivers like the Elecraft K2 (larger) or the Icom IC703 (a bit smaller).
A general and good practice in engineering is a steady process of improvement. This article describes the construction of a high performance transmitter/receiver for SSB (voice) communication covering the 14MHz (20 meters) high frequency amateur radio band.
Various modules that have proven high performance, liability and ruggedness in recent constructions will be combined to form a radio with outstanding receiver performance, an ultra linear transmitter with output range 15 to 20 watts and a top audio sound quality both on transmit and receive.
Key features are:
Dual DDS frequency generation with AD9834 (Local oscillator) and AD9951 (VFO),
Microcontroller (MCU): ATMega644P by ATMEL,
Single conversion superhet receiver with 9MHz interfrequency (IF) and preamplifier, mixer and IF amplifier equipped with Dual-Gate-MOSFETs,
Audio-derived automatic gain control (AGC),
Transmitter with MC1496 as double sideband (DSB) modulator and NE602 as transmit mixer,
power transimitter with 4 stages, final stage in push-pull mode.
Another version of this radio has been built before. But this one was equipped with a variable frequency oscillator (VFO) because of nostalgia reasons. Unfortunately a VFO lacks certain features (frequency stability above all) which can be overcome by using digital frequency synthesis without losing performance. Usage of a high performance DDS systems is a prerequisite to achievement and a possible solution.
Most building blocks of that respective radio have been redesigned except the VFO section that turned out as not being able to deliver the projected frequency stability to a 100% degree. Frequency instability occurred because of the flatness of the former cabinet that brought the aluminum case too close to the VFO tuned LC circuit. Aluminum has a huge tendency to expand under the influence of heat so the rig was very temperature sensitive. That undeniable fault lead to a complete reconstruction using the old RX and TX modules and building a new set of frequency generators.
Parts of the old cabinet were reused but because of the fact that the whole rig got increased vertical expansion, the cabinet was “stretched” with two lateral strips of Aluminum.
Also a full electronic transmit/receive switch with p-channel power MOSFETs has been designed to avoid usage of a DC switch relay and get a “smooth” switching.
Another objective of this radio was to get out the absolute best performing circuits of the recent projects and to build a real high-performance radio. Hence this transceiver is also some sort of an improvement of the “Old school SSB TRX” as well. The circuit empirically turned out to be very good for communication in the 14MHz band. Because of this frequent readers of this website might detect certain similarities. 😉
The Receiver section
The design objectives were:
Low noise (achieved by using Dual-Gate-MOSFETs with the receiver to a large extent)
High dynamic range (achieved by using a Dual-Gate-MOSFET as receive mixer)
High AGC range (achieved by taking RF preamp and IF amp into the AGC chain)
Good audio quality (achieved by using a TBA820M as integrated AF amplifier circuit and a 5 cm loudspeaker)
RF preamplifier and receive mixer
The radio frequency preamplifier has been designed primarily to improve the receiver’s noise figure. Delivering additional gain only is relevant in second order.
Preselection is performed with only one tuned circuit int G1 line. The center frequency of this circuit is 14.180MHz. In the output section of the stage an another identical LC circuit has been installed. This turned out to be sufficient because there is no immediate need of higher preselection. The subsequently placed mixer, that is also equipped with a Dual-Gate-MOSFET has very good high level processing qualities. No interfrequency feedthrough could be observed with various antennas. No IMD occured even when signals were very strong. Testing out in the field with partable antenna very far from man-made noise sources the receiver was very quiet and even very weak stations could be received and read with Q5.
To get most of gain swing from AGC the preamplifier is controlled by a DC voltage between 0 and 12V supplied by the AGC control stage to be described later. This voltage is halved by a 1:1 resistor voltage divider because maximum gain of the Dual-Gate-MOSFET occurs with about 6V DC applied to G2.
Clipping diodes that are sometimes used to prevent high voltage entering the 1st stage have not been installed because they are prone to produce unwanted IMD products if signal levels from the antenna are too high and undesired mixing takes place there.
To prevent self-oscillation in the preamplifier, the tuned circuit LC1 and LC2 are connected together in a special way. G1 is connected to the tuned section of LC1. This section has high impedance, thus it should be connected to a load which also has high impedance. The coupling section of the coil with low impedance is connected to the 50Ω antenna. There are not two tuned parts of the LC circuits together in one stage.
The output of the Dual-Gate-MOSFET (low impedance) is connected to the coupling winding, the high impedance tuned part is going the high impedance of G1 of the mixer. The impedance ratio between the two coils is 16:4 due to the winding ratio of 4:1 of the coil set.
The sensitivity and noise figure of the whole receiver is determined by these two stages. Measurements showed that the minimum discernable signal is about 0.1µV which is very good for a short wave receiver.
SSB-Filter, IF amplifier, Demodulator, AF amp and AGC
The following stages are some sort of best practice combination of circuits that have proven to perform very well in the recent projects.
SSB-Filter and relay
The SSB filter is switched with a special rf relay by Teledyne® ensuring excellent isolation of relay ports with very low capacities in the unswitched signal path. Here the usage of shielded cable is mandatory for connecting the relay/filter section to the transmitter (see later text!). A clamp diode has been installed to eliminate high voltage peaks due to self-induction when the relay is switched. This will prevent the MOSFETs in the switching unit from excessive voltage and possible destruction.
A proven and reliable circuit can be found here as well. One stage delivers IF gain of about 12dB which is sufficient because the mixer following as a demodulator (NE612) also propduces some dB of gain. Too much gain in this section only contributes to high noise in the speaker later and is not desirable.
The Dual-Gate-MOSFET in this stage is also integrated to the AGC chain. Together with the RF preamp installed in the front and also being part of AGC control end we will get some 20 to 25 dB of gain swing when AGC is fully driven. This turned out to be enough, only in some rare cases I found that the manual gain control (also included in this recevier) needs to be used in addition when AGC is not able to cope with excessive signal levels.
Compared to a MC1350 IC equipped IF amplifier I found that gain control is much smoother because the V->dB function is very much less precipitously with the Dual-Gate-MOSFET than it is with the MC1350.
NE612 is built-in here. The main advantage of this IC is that it requires only a few components and it has got an additional gain of about 12dB or more.
In VDD line you will find a 5.6V Zener to bring 12..14V supply voltage down to about 6V. There are also two capacitors. The 0.1uF is for bleeding off rf energy from or to the supply rail, the same is the purpose of the 10uF cap for audio frequencies or low frequency noise present on VDD line. This noise sometimes originates from the digital components in the radio and should be eliminated at all reasonable points in the circuit. Also it will help to prevent the high gain amplifier chain from self-oscillating in the audio frequency range.
Audio frequency amplifier section
Two ICs are used here. The first is an operational amplifier (uA741) with a 150kΩ resistor as part of negative feedback circuit. This value is comparatively low. If (in rare cases) higher gain should be needed it can be replaced by e. g. 330kΩ or even more.
The main audio amp is the TBA820M, an integrated audio amplifier in 8 pin DIL case. It is an interesting alternative for LM386 because tendency for self-ocillation is much lower within the TBA820M. But it requires some more components. TBA820M can be switched with the load (speaker) to VVD or GND. I use a headphone jack in the radio, that is grounded, hence I prefer the latter version.
A “good” loudspeaker with 5cm of diameter was found by ordering a larger series of different speakers from Chinese vendors via ebay. The differences in sound quality are breath-taking. So it is worthwhile spending some money and order a larger variety of speakers and install the very best one.
This is a circuit I have used many times and it has proven to work very reliable. If you wish to have different settings concerning attack and decay time then another cap can be added via a switch to GND in parallel to the 47uF cap. Another 100uF for example will give a few extra fractions of a second in attack/decay time.
A 20kΩ variable resistor is used for manual gain setting. The AGC voltage that is near to VDD (12V or more) is divided and so AGC and manual gain control can be combined. At least until the point where noch AGCing will take place because the resulting voltage is <3V.
The “AGC thres.” variable resistor shown in the schematic will determine the point where AGC becomes active. I usually set it that way that solely band noise does not affect the AGC. Stronger stations (coming with S5 or 6 with a commercial transceiver) should give first minor influence on the AGC voltage. That is the point where amp gain should start dropping gradually. Strong stations must set AGC voltage to nearly 0 V.
The Transmitter section
The transmitter generally consists of two parts:
The SSB generator and the TX mixer, and
the Power Amplifier.
The full schematic of the two parts together:
Starting from the left we see the microphone amp. A nostalgic but still available operational amplifier integrated circuit (741) is used here. The amp has high gain (about 30dB) to make a dynamic microphone connectable. There is no DC feeding for an electret microphone. If you should wish to use one then the negative feedback resistors should be lowered to about 47kΩ and the audio level should be carefully observed to avoid excessive driving. DC must also be applied for htis type of microphone!
Double sideband generator
The MC1496 (still available as NOS in 14 pin DIL case or fresh from the market in SMD package by ON Semiconductors) offers high carrier suppression of about 50 to 60 dB. Therefore a network of 2 x 10kΩ and a 50kΩ variable resistor has been installed. The crucial point: To make full usage of this network the carrier offset must be set properly. If you should notice that there is no point within the full swing of the 50kΩ variable resistor then the carrier frequency should be readjusted.
A balanced output transformer has been installed to improve carrier suppression and to enhance output voltage.
SSB filter coupling out
The usage of shielded cable is mandatory here to avoid transfer of rf stray energy into the DSB and SSB line!
This stage also is equipped with an NE612 doubly balanced mixer due to reasons of circuit simplicity.
14MHz Band pass filter
This filter also needs observation. I use the TOKO style coil formers familiar from other projects. The winding data can be found in the schematic. The coil formers must have the ferrite caps and metal shield cans on to avoid incoupling of rf energy from the subsequent power stages. The filter should be placed away from the higher power stages to avoid self-oscillation inside the transmitter section.
RF amplifier power stages
The amplifier presented here has been tested in 2 different radios so far and has proven to be very stable, very linear and very rugged against antenna mismatch. The power levels are about 10 db gain per stage. From the second stage on the output impedance is 50Ω. This makes it easier to measure power levels with a 50Ω standard dummy load.
The 2 watt driver stage uses a PI-filter instead of a broadband transformer. This is because I intended to save some space on the veroboard and for a monoband transmitter this is a practical solution. If you should find out that there is a mismatch that results in losing gain, then the capacitors can slightly be modified because the L-network has impedance transforming capabilities. By knowing input versus output impedance and calculating a “Q”-factor subsequently L and C can be computed to get a defined step-down impedance (Link for further information). This is a useful method and, in case of low pass filter like applied here, there is also a filter for harmonics.
Driver and PA power amp are biased for AB-mode, all other stages operate in A-mode to ensure best linearity. Strategies using emitter degeneration and negative feedback are inherent in preamp and predriver stage.
All transistors apart from preamp stage require usage of heat sinks.
Impedance matching is either not done (stage 1 to 2), by transformer (stage 2 to 3) or by L-network (stage 3 to 4). Whereas from stage 3 to 4 also there is a transformer applied to split the signal symmetrically to the two bases of the final transistors.
If there should be a tendency for self-oscillation within this stage the input transformer secondary winding can be center tapped and put to GND via a 0.1 capacitor.
Power out depends on DC power voltage and is about 20 watts when run on 13.5 V DC power supply an the amplifier terminated to a 50Ω load.
This is a spectroscopical analysis of the fully driven transmitter (f=14.200kHz, Pout = 20.1 watts, VDD=13.0V) and the remaining carrier.
Harmonics are filtered very effectively . This is achieved by using a push-pull final stage driven in AB mode. Some authors say this is useful to eliminate odd number harmonics. On the other hand there are two sections of low pass filtering (one between driver and PA, one following PA). The figure of the output spectrum between and 50 MHz below:
The Dual DDS Oscillator System
The DDS has got the following features:
VFO: AD9951 + amplifier,
LO: AD9834 + amplifier,
LCD: NOKIA 5110,
Tuning: Optical rotary encoder by Bourns,
User interface: 4 keys to control the digital settings,
Analog inputs: User keys (ADC0), VDD (ADC1), S-Value (ADC2), TX PWR (ADC3), PA Temp. (ADC4).
The control lines for DDS1 (AD9951) and DDS2 (Ad9834) are as follows:
The colors are the colors used for the cables in my radio.
The LCD is connected likewise:
The NOKIA5110 LCD has been designed for VDD=3.3V. Please use 10kΩ resistors in the control lines which are not in the schematic! 3.3V are derived more or less closely by switching 2 Si-Diodes in series which results in a voltage drop of about 1.4V. Hence the LCD gets 3.6V DC from the 5V supply chain which is no problem for the module. One big advantage of the Nokia LCD should not be forgotten: It is very quiet and does not produce any discernable digital noise. Thus it is my favourite meanwhile for receivers on the RF bands.
For both DDS modules coupling out the rf is done with symmetrical circuits using trifilar broadband transformers. 10 turns on a FT37-43 core are a good choice. This will enhance gain and reduce spurs.
DDS2 is clocked to 110MHz, but keep in mind, that AD9834 is specified for 75 MHz max. clock rate only. I found out that modules from the “grey market” sometimes fail and produce lousy signals when overclocked. You can see that on a scope when extra peaks appear or with the spectrum analyzer when spurious signal are frequent. I recommend buying with Mouser or anther trusty vendor for example or reduce clock rate in case of problems in signal quality.
Power consumption is not excessive because both DDS modules are for low power application, unlike the AD9850 or AD9835, that draw much higher current. Power rate is 300mA when in receive mode with LCD backlight on.
The C-code for the software has about 2600 lines source code and can be downloaded here.
A standard CB DC supply cable is used here. Unfortunatel the plugs equipped with a cable and fuse holder are widely availabe but the sockets have to be stripped from old CB trasnceivers.
On the air the transceiver performs great. Audio is clear and powerful what the QSO partners often tell me. The receiver is fun to listen to, sounding soft AND precise. Maybe I will do a YouTube video the next weeks to prove it! 😉
All my rigs are for portable, hiking, bicycle trips and travel to foreign countries. I use Aluminum as a basis for the hardware to keep the radio lightweight. With this radio a ground plane made of 0.8mm Aluminum sheet metal has been used that one has been enforced with a lateral additional ground plane carrying the DDS system (see pictures in this article, please). Thus the base frame is pretty rigid and not prone for bending.
Front an rear panel are made from 0,.8mm Al sheets (rear) and 0.5 mm Al sheet (front).
The various subassemblies (DDS, receiver, transmitter) are split into different modules and are seperatelay fixed with bolts and washers mounted to special spacer bolts for screws of 2mm diameter. This ensures better grounding instead of using larger veroboards. Connections are made from flexible stranded hook-up wire and shielded cable for rf and audio signals.
On the undersides of the single boards copper foil is used for lines with GND portential.
When building a direct-digital-synthesis (DDS) frequency generator, the engineer has to take into account one inherit shortcoming of this state-of-the-art technology: Spurious signals that are an unwanted product of generating a radio frequency signal with a synthesizer. These signals occur in a wide range of frequencies and are a limiting factor for receiver performance particularly sensitivity. A method of examining and evaluating these unwanted signal products will be described and some guidelines for amplifier design will be presented.
Spurious signals in a DDS system originate from various signal sources in
the microcontrollers (MCU) driving the DDS. The responsible parts inside the MCU are clock oscillators, dividers, pulse-width-modulation (PWM) timers etc.
the DDS chip itself mainly from clock dividers and the digital-analog-converters (DACs) used.
Various factors contribute to the problem. First the topology of the synthesizer itself. These systems contain a DAC to form a sine wave signal out of a computer calculated synthesizing data model. DACs have a wide variety of bitwidth. A rule of the thumb is: The more bits the DAC has, the lower the number and the weaker the spurious signals will be. 14-bit DACs by ANALOG DEVICES e. g. perform sufficiently for low noise receivers.
Another topic is clock rate. The occurrence of unwanted signals out of the synthesis process is a reciprocal function of clock rate. So it is highly recommended to use the highest possible clock rate the respective chip is designed for. When experimenting with the AD9951 the following findings occured: From 200MHz primary clock the number of spurious signals significantly decreases. The usage of an internal clock multiplier (if available) is not recommended since it will deteriorate phase noise because another oscillator is added to the signal generating chain..
So far the theory that is common today. Another aspect should now be brought into discussion: The role of the stages that are the successors behind the mere synthesizer. First stage usually is an amplifier that is used to lift the signal level of the synthesizer (usually about 1Vpp.) to a level that it is needed for a certain type of mixer.
The DDS circuit
To eliminate any weakness in the basic generator underlying this research a high-level performance synthesizer has been constructed. This ensures a pure sine wave output which is essential because we want to examine the potentially negative outcomes of the various small signal amplifiers succeeding the synthesizer.
The DDS chip used in this circuit is the AD9951 by Analog Devices that incorporates a 14-bit digital-analog-converter (DAC). Clock rate for the chip here is 200MHz (400MHz max. according to data sheet), clock output is 1.8Vpp. which is the maximum signal level that is suitable for this 1.8V-technology based DDS.
The AD9951 DDS integrated circuit needs 2 supply voltages: 1.8V for the digital and analog circuits and 3.3V for DVDD_I/O, the output driver voltage.
Controls lines are 5V applicable which makes the DDS suitable for being controlled by a 5V microcontroller as well as a 3.3V system.
The signal outlet in this case is made from a symmetrical transformer (3 parallel windings 10 turns each on a FT43-37 core) using the IOUT1 and its corresponding paraphase outlet IOUT2. To use the balanced output is another effective possibility to reduce spurious signals as well as to enhance signal voltage by about 3 to 5 dB.
As first step the unamplified signal shall be inspected. In a wider spectroscopic range (f0=8.65MHz, fgen.=16MHz, f1=250.0MHz) the signal performs as shown below where f0 and f1 are the edge frequencies of the spectrum analyzer and fgen. is the output frequency of the DDS):
A first spurious signal can be detected with a signal level of more than 40dB below the generated signal. The signals at around 100MHz supposedly are strong FM stations in the VHF radio band whose energy from a nearby radio tower is coupled into the laboratory via the short wave antenna cable ending on top of the workbench. The peaks around 200 MHz are likely generated by the DDS clock oscillator.
Switching to a more narrow spectrum, we get this reading:
Remarkable that there is no even first harmonic that should be expected around the 32 MHz region. It is highly probable that this elimination of the 1st harmonic is caused by the symmetrical decoupling of the signal from the DDS. Hence we know that push-pull operated amplifiers reduce distortion and therefore tend to minimize even harmonics production.
Remarkable on the right falling edge of the main peak there another signal occurs hidden by the main curve which requires further examination.
Examining amplifiers for a DDS system
1.) Bipolar RF preamplifier circuit (adapted from DeMaw et. al., Solid state design for the Radio Amateur)
The first amplifier under test is a simple circuit containing a bipolar transistor. To reduce distortion emitter degeneration and negative feedback (from collector to base) have been installed. This is an amplifier that is often used in rf amplifiers as first stage of the power strip. Therefore it should contribute less to the overall distortion of the circuit.
Overall voltage gain with a 2SC829 RF transistor (fT=230MHz) is 13dB with 1 MHz, decreasing about 3 db per octave, power gain has not been evaluated.
With the settings of the spectrum analyzer unchanged it turns out that this amplifier obviously produces new signals that are prone to disturb the receiver of a radio where this amplifier is installed:
Signal level is about 2V pp.
One countermeasure is to carefully check the input level of the amplifier. Excessive input voltage will bring the amplifier into the clipping area thus generating IMD products and harmonics. We usually do not only observe the output signal with an oscilloscope but use the spectrum analyzer in parallel. This ensures optimized signal quality.
Proper biassing is essential for this type of amplifier, aside from the linearization described before. The operating point (also referred to as “Q-point) must be set in the middle of the linear part of the IBE->IC function.
Usually this is achieved by applying a positive voltage (for NPN transistor) so that a given “quiescent” current flow through the base-emitter line. In the most simple case a voltage divider with the base connected to the joint of the two resistors works satisfactory.
Any AC voltage applied now will alter the voltage sum of DC (quiescent) and AC around the Q-point.
In my last article I talked about my ideas fo a new transceiver project beyond the QRP level. First pictures of cicuitry were also shown. In the meanwhile the transceiver has been finished, some minor changes had to be made and now it’s time to go to the details.
All construction objectives (compact size, sufficient output power to establish even DX contacts on 40 meters, good stability, good receive performance, rigidness for outdoor use) have been met so far as I can say. I had the rig with me, when I was on vacation on the Island of Jersey (GJ/DK7IH/P) from 12th to 19th of August this year. It was big fun operating the rig. Lots of stations were calling during the two days when I was on 40 meters. ODX was HL1AHS, OM Kun from Seoul. So, this was very nice for 50 watts and a vertical antenna made of a fishing rod.
First, to give an overview, let’s have a look on the completed transceiver. Cabinet size is 7.5 x 16 x 6 centimeters.
As you can see, the rig is very compact in size. The block diagram gives you an overview what is inside. Receiver section is on top, DDS can be found in the center and the transmitter is sited at the bottom of the diagram. As you can see, it’s again not rocket science and SDR-virus could not strike as well. 😉
The next posts will describe the rig in details step by step. Proceed with the receiver’s front end.
On one hand sunspot cycle is on the decline. Conditions on the higher bands tend to deteriorate gradually. On the other hand I wanted a very compact transceiver for outdoor (particularly holiday) activities. Besides this and due to the fact that I prefer monoband operation when on tour, the potentially ideal band had to be found. Based on these prerequisites I made up my band to go to 40 meters for this project.
Some interesting concepts for QRP-transceivers for this band can be found on the web. The “Santerre” and the “ILER40” should be mentioned. These operate with power levels of about 5 watts which I thought should not be enough in most of the situations. My opinion is, that on 40 meters it’s not the best decision to operate on the standard QRP watt level, e. g. like the mentioned before and my other rigs have been designed for. With high probability you’re about to get lost in the naturally higher band noise and QRM that is around on 7 MHz. Thus, 50 to 70 watts possibly should be a more suitable power level to operate on.
From the electronic point of view this transceiver doesn’t involve very much new stuff. The 4-stage transmitter with push-pull driver and final from my multi-band rig with emitter degeneration circuitry in every stage to improve linearity but without negative feedback in this circuit. Some NE612/SA602-mixers in receiver and transmitter, MC1350 as the rx’s if-amplifier, LM 386 as audio amplifier, busines as usual. DDS with AD 9551 for frequency generation. No fuss, no SDR-stuff. “Old school” homebrewing. Not more, but not less.
The challenge this time was to increase package density once more to an achievable maximum. The maximum size I wanted to have was the size of a carton of cancer sticks, also known as “cigarettes”.
Another problem of the project was to get a high power rf amplifier with an output level very much beyond standard QRP and avoiding any unwanted coupling, parasetic oscillations etc. even when components are very densly packed. A clean signal is a must, not of the package size.
The center of the construction is made of the aluminium carrier of the 50 to 70 watts final that is in the center of a three layer arrangement consisting of
rf power amplifier
rf board with SSB generator, tx mixer, pre-amp, pre-driver and driver (push-pull).
The parts of this assembly:
The main frame carrying all the other stuff:
Dissambled mounting frame of QRP transceiver for 40 meters (2016 by DK7IH)
The aluminium plane centered will keep the PA 50 to 70 watts board. This one is equipped with two MRF455 rf power transistors made by Motorola.
Above and below this board the receiver and transmitter boards are mounted to a three layer package.
These 3 boards are stacked and plugged into the front unit that you can see underneath. The front subassembly is formed of
the front panel with user controls, microphone socket and LCD
the DDS system and
the relay switching board.
Both construction groups are joined in an angle of 90° by a set of plugs and sockets so that they can be put apart easily and fast for service or improvements. All boards are made of 5×7 cm “FR4” material Veroboards.
In the center of the right board package you can see the PA amplifer, capable of delivering 50 to 70 watts SSB signal, on top the rx board, at the bottem the transmitter board.
An important issue for a high power transceiver is the transmitter’s final amplifier. Particularly thermal conductivity should be kept in mind. In this case one problem, I thought, might occur because the power transistors are not mounted directly to the rear panel of the transceiver where heat can be lead to the outside easily. Here, the two MRF455s are sited in the center of the sandwich construction holding the 3 main rf boards. But as this transceiver is for voice operation only with its comparatively low duty cycle of 10 to 20%, this was not considered as an unsolvable problem. But thermal aspects must be kept in mind, anyway.
As you can see, the final transmitter stage is based on an aluminium sheet metal of 2 mm thickness. Under the board there is a second layer also of 2 millimiter thickness aluminium. By the rear end it is joined to a solid piece of square shaped aluminium rod that itself is connected to another two thick layers of alumium which are srewed to the rear panel holding a heat sink. For this heat sink I’m currently searching a more massive one.
The thermal test was a longer QSO with Dave, M5AFD . During this longer QSO with transmission times of up to 3 to 4 minutes each the center alu panel got a temperature of 60° to 65° centigrade. Thermal stress? Not worth mentioning yet!
So far I’ve done about 50 QSOs on 40 meters with this rig, gradually improving some things. Later I will publish the detailed scheme as soon as it is finished. By now prospects are good to bring this compact QRO transceiver with me on a holiday trip to Jersey Island planned this summer.
The next step in improving my homemade QRP multiband transceiver was to reconstruct the DDS VFO. This was not urgently neccessary but after some months of continously operating the rig I was not 100% satisfied with the spurious performance of the AD9850. The AD9850 is a DDS device with only a 10-bit digital-analog-converter (DAC). These ones tend to put out still a quite high number of spurious emissions aka “birdies”.”Birdies” then are detected in the receiver causing unpleasant beep tones.
The AD9951 DDS module (some general information)
Analog Devices (AD) also offers more professional DDS-chips with a better performing 14-bit DAC. The AD9951 is such a device. It is offered for about 25 USD by mouser.com and other vendors. It is also used in commercial ham band transceivers thus we can deduce that performance is improved compared to the cheaper DDS devices made by AD.
The AD9951 needs multi supply voltages, i. e. 3.3V and 1.8V. Digital inputs are 5V-compatible if 3.3V as D_VDD_IO input voltage is applied. The device can be clocked up to 400Mhz. If you use a clock generator with lower frequency, an internal clock multiplier can be used. But this deteriorates phase noise to a certain degree. For my VFO which works in the range only from 13 to 20 MHz I use a simple standard 5V 120MHz clock generator and I do not use the internal clock multiplier. To make the clock oscillator’s output 1.8V compatible a simple voltage divider has been applied.
Note that performance concerning phase noise of the DDS also depends on the voltage of the clock generator. The lower it is, the more the phase noise performance will deteriorate. To calculate exact configuration of your voltage divider keep in mind that input impedance (1.5 kΩ according to datasheet) and input capacitance (3pF) are paralleled. Input capacitance causes reactance depending on the input frequency given by the following equation:
As usual for me the DDS output consists of a balanced-to-unbalanced broadband transformer followed by an rf amplifier. For the latter one I use the MAV-11 broadband amplifier made by Minicurcuits.
This the circuit of my improved DDS device:
The first impression when I connected the AD9951-DDS to my HP 8558B spectrum analyzer was that the signal looked different compared to a AD9850 generated signal. I’m very sorry, but so far I’ve got no photos but I’m planning an article that will deal with DDS comparisons which will have photos of the spectrographic analysis of the various signals. But it was visible on the first sight, that the signal looked much cleaner than a one produced by a DDS with 10-bit-DAC.
OK, there were much lower sidetones to the main signal on the spectrum analyzer. Measurements are one side of the medal, but how would the DDS perform in the receiver? It approved to have improved when I installed the new DDS into the transceiver and listened to the bands. “Birdies” have vanished to nearly 100%, only some very weak spots are discernable. And the receiver noise also seems to have lowered by a certain degree. But I don’t have measured that so far. Measurements are still to be done. OK, let’s check it out the following days (20 meter is very quiet today!) and then I will be able to say if and how the 14-bit DAC.
So, if you want to get the best performance (low number of spurs, low phase noise) out of the AD9951, here are some basic hints:
Stay away far from the Nyquist-Frequency of the chip! Basically this is one third (33%) of the clock rate. I recommend to lower this down to one fifth. So, if you use a clock rate of 100 MHz, don’t let the DDS produce more than 20 MHz!
Don’t use the internal clock multiplier! Use a clock generator with the highest possible frequency!
Use a clock generator that will put out 1.8 Volts pp!
Keep ground leads on your pcb as wide and short as possible!
Decouple AVDD, DVDD and DVDD_I/O effectively!
Set DAC_RSET to a value that DAC current stays lower than 10mA. 3.9k is a recommended value.
The DDS is mounted to a small piece of veroboard using a 48-lead breakout-board for TQFP48 ICs:
Flexible wiring is used to connect the board to the microcontroller. Shielded cable is mandatory for connecting the rf feed to tx and rx mixers.
Underneath you’ll find some code snippets to set the frequency of the AD9951 device. The code has been copied 1 by 1 from my SSB transceiver’s software. Thus modification for your purposes might be neccessary.
After inspiring discussion with a reader of my blog I’ve changed the routines to optimize code concerning performance. The major objective was to avoid intense use of floating point functions because they are slow. Instead I used bitshift operations widely. But there is one floatingpoint calculation left:
fword = (unsigned long) frequency * 35.790648;
The floatingpoint constant 35.790… results from a division of 0xFFFFFFFF by f_clock which is given by the equation of the tuning word (see datasheet of AD9951). This could be converted to a bitshift operation too, if you use a programmable clock oscillator tuned to 134,217,727 Hz. Then the multiplication factor is 32 which can be easily achieved with another bitshift operation.
Thanks for reading!
Setting the AD9951’s frequency output
void set_frequency(unsigned long frequency)
// FQ_UD: PD0 (green)
// DATA: PD1 (white)
// CLK: PD2 (blue)
// RESET: PD3 (pink)
unsigned long fword;
int t1, shiftbyte = 24, resultbyte;
unsigned long comparebyte = 0xFF000000;
//Calculate frequency word
//Clock rate = 120002500
//0xFFFFFFFF / 120002500 = 35.790....
fword = (unsigned long) frequency * 35.790648;
//Initiate transfer to DDS
PORTD &= ~(1); //FQ_UD lo
//Send instruction bit to set fequency by frequency tuning word
//Calculate and transfer the 4 bytes of the tuning word
//Start with msb
for(t1 = 0; t1 < 4; t1++)
resultbyte = (fword & comparebyte) >> shiftbyte;
comparebyte >>= 8;
shiftbyte -= 8;
//End transfer sequence
PORTD |= 1; //FQ_UD hi
//Send one byte to DDS
void spi_send_byte(int sbyte)
// PORT usage
// FQ_UD: PD0 (green)
// DATA: PD1 (white)
// CLK: PD2 (blue)
// RESET: PD3 (pink)
int t1, x = 0x80;
for(t1 = 0; t1 < 8; t1++)
PORTD &= ~(4); //Bit PB2 set to 0
//Set respective bit to 0 or 1
if(sbyte & x)
PORTD |= 2; //SDATA Bit PB1 set to 1
PORTD &= ~(2); //SDATA Bit PB1 set to 0
//SCLK line set to 1 // = set clock line to RISING edge to store bit in frequency word
PORTD |= 4; //Bit PB2 set to 1
x >>= 1; //Shift bit to divide x by 2
Resetting the AD9951-chip:
(A reset must be performed once immediately after your program was started and before you
transmit the first instruction to the AD9951 DDS chip)
// FQ_UD: PD0 (green)
// DATA: PD1 (white)
// CLK: PD2 (blue)
// RESET: PD3 (pink)
PORTD |= 0x08; //Bit PD3 set
_delay_ms(1); //Hold reset line hi for at least 20ns.
PORTD &= ~(0x08); //Bit PD3 erase