SSB Transceiver, 7MHz, 50 Watts, with Dual-DDS-System

DK7IH QRO SSB transceiver for 7MHz/40m
DK7IH QRO SSB transceiver for 7MHz/40m

In this paper we will discuss a single sideband amateur radio transmitter/receiver for the 40 meter band that has been designed to ensure  good performance characteristics with reasonable number of parts (no “overkill” in component use), particularly concerning the receiver. Circuit simplicity and over-average performance were to be combined.

The background: Some years ago I had built the ancestor of this transceiver and afterwards posted an incomplete series of articles (starting here). The transmitter was considered to be quite OK (I could even work a station from South Korea when operating as GJ/DK7IH some years ago) but the receiver was weak.

The shortcomings originated from the rf preamplifier I used together with the 1st mixer, an NE602. The latter had severe problems to cope with the high signal levels on the 40 meter band from out-of-band broadcast stations transmitting on the 41m band (f>7200kHz) or from very strong amateur stations transmitting in-band. This is caused by the technical specs of this Gilbert cell mixer. NE602 has been designed for mobile phone applications and not for shortwave radios. Its IMD 3 is only -15dBm whereas it is able to detect weak signals (-119dBm with an S/N ratio of 12 dB) according to datasheet. Due to this NE602 was excluded from being used at least in the receiver.

Another point was that the rig was too small and too densely packed to be called “service friendly”. Thus I dismantled the radio some times afterwards and had in mind rebuilding it with another receiver and a little bit more space inside.

The Basics

The project has had to meet certain requirements that I would like to point out first:

Frequency generation: Dual-DDS-System: AD9835 as local oscillator and AD9834 as VFO. ATMega644A as MCU (Download source code here)

Receiver: Single conversion superhet, 9 MHz interfrequency with commercial filter (supplied by shared by transmitter and receiver and relay switched, “NE 602-free zone” ;-), 4 dual gate MOSFETs in rf preamp, rx mixer, if amplifier and product detector, audio stages with BC547 as preamp and LM386 as main audio amplifier.

Edit: I found that there was strong signal of self-reception around 7.100kHz which was not a spurious signal from one of the DDS. It has been a mixing product of one or two oscillators together with a signal from the microcontroller. So I changed the interfrequency to 10.7MHz which cured the problem. I tried to calculate the issue but was not succcesful because I do not know all the frequencies in the microcontroller. I think it is most probable that it is a harmonic of the PWM signal I use for controlling the LED front lights.

Transmitter: 4 stages, 3 of them in push-pull mode, Siemens made mixer IC S042P (really old fashioned, but still available) as DSB generator and TX mixer, rf amplifiers (2N2219A) after filter and tx mixer.

Design: Really “cool” with blue backlight. Sandwich built, not the size of a “micro transceiver”, but handy for travelling.

The Block Diagram

The diagram can be derived from the old project, it is nearly the same:

DK7IH QRO SSB transceiver for 7MHz/40m - Block diagram
DK7IH QRO SSB transceiver for 7MHz/40m – Block diagram

The basic outline of the radio is standard and should not be further discussed.

Dual DDS (VFO and Local Oscillator (LO))

This time I wanted to use 2 digital oscillators. The reason was just to have fun. 😉 Here is the schematic:

DK7IH QRO SSB transceiver for 7MHz/40m - Dual DDS (VFO and LO)
DK7IH QRO SSB transceiver for 7MHz/40m – Dual DDS (VFO and LO) – (Full sized image)

Microcontroller (MCU)

The source code has got about 2200 lines. With the GNU C compiler this leads to a HEX-file of about 43kB. Because of this the controller had to have a little bit of more memory. A “644” is a good choice here. It is clocked internally to 8 MHz clock rate. Radio and user data (user operated keys, S-Meter, TX PWR meter, temperature sensors attached to final transistors) is lead to the analog-digital-converter (ADC) of the MCU. Rotary encoder (optical) is fed into digital inputs. Integration of an RTC is projected but not done yet.


Here an AD9834 is used. It is overclocked with 110MHz clock rate. For my receiver with a DDS chip purchased from Mouser this works without any abnormality. With a a chip from the “free market” (ebay) I found that there were strange clicks in the signal. So, I do not really recommend overclocking under any circumstance and/or not to such a high degree.

This DDS is is not terminated with a low pass filter. Due to the high clock rate there is no clock oscillator feedthrough which is supported by the  design of the following amplifier having an audio frequency transistor in the last stage (BC547 and later BCY59) that limits high frequency components due to its early gain decay in the frequency spectrum. The two stage amplifier has been designed for excellent linearity to prevent impurities in output spectrum.


The first peak showing the 16MHz signal and the next peak is the first harmonic about 30dB below. Other peaks are from local sources (PC, Printer).

The sine wave also looks quite OK:



This one contains an AD9835 synthesizer clocked to 50 MHz. An LPF here is mandatory. A simple but linear amplifier brings the signal up to 3Vpp which is OK for driving the dual gate MOSFET in the receiver. For the transmitter mixers this amount of voltage is too high, small capacitors reduce the voltage to an acceptable value.


From another project that I once had built and that is not more in use, a dive computer, I had a 4 lines/20 characters text display that is fairly large. This was to be designated as the LCD for this transceiver.

The Receiver

Building a receiver for the 7MHz amateur band is challenging. On one hand the circuit should be very sensitive for weak signal reception, particularly during day when the band conditions are low due to solar radiation and density of the D-layer. This means the receiver should have a higher gain whereas noise figure does not play a predominant role due to band characteristics with high atmospheric noise on 7MHz.

Next request is high dynamic range to eliminate the spurious signals that occur when front end stages are loaded with high input signal levels.

And last but not least AGC control range should be as wide as possible to cope with weak and very strong signals without the request to intervene by adapting manual gain control. For this a preamp also benefits.

Active mixers like the NE602 show low performance under these conditions. Some high-current mixers like the SL6440 exist, but there are alternatives. On one hand the classical diode ring mixer might come into perspective, otherwise Dual-Gate MOSFETs are well known as having a fairly good ability to cope with high signal levels and so don’t tend to  deteriorating the receiver’s performance severely. Besides they offer some gain and low noise figure (which has not been the main objective in this case) and the circuit is very compact and therefore it was the best choice for a receiver that had been intended to be constructed onto a board of 6 x 8 centimeters.

After these thoughts the following circuit turned out to be the right onset for a receiver inside the projected rig.

DK7IH QRO SSB transceiver for 7MHz/40m - The Receiver
DK7IH QRO SSB transceiver for 7MHz/40m- The Receiver (full sized image)

Circuit explanation (Receiver)

Front end

On the left we start with a 2 pole LC band pass filter for 7 MHz. The coils are wound on TOKO style coil formers (5.5mm size), winding data and parallel capacitors are given in the drawing. The coupling capacitor (2.7pF) between the two LC circuits is very small for such a low frequency. This makes the filter response curve sharper but leads to a slight weakening of the signal coming through the filter. But as the whole receiver has plenty of gain and a very good noise figure, this is the reason why  some weakening of the input signal is acceptable.


Next is the preamplifier for the received band. It is connected to the AGC chain. You can expect some 25 to 30dB  gain swing by driving up gate 2 of the dual gate MOSFET from 0 V to 6V. A 1:1 voltage divider decrease the 0..12V AGC voltage to 0..6 V where th3N205 MOSFET is close to amplify with maximum gain. Exceeding 6 to 7 volts does not result in significant more gain swing, so I usually drive the MOSFET from 0 to 6.5 volts UG2 (with 13 Volts of supplied voltage.

UG2->Gain-Function 3N205 (Source: Datasheet)

The coupling when going from the preamplifier to the receiver mixer is in broadband style. The 3N205 has a very high gain and tends to self-oscillate. A second LC circuit makes the device more prone to going self-resonant and hence produce unwanted signals.

RX mixer

This mixer is very simple and needs only a few components. Both signals are fed into the gates of the dual gate MOSFET. Rf goes to gate 1 whereas gate 2 (the AGC input) is fed with the oscillator signal). Gate voltage depends on the voltage drop at the source resistor and therefore is stabilized. The oscillator signal should be in the range of 2 to 3 volts rf (pp) for a dual gate MOSFET. Lower values will deteriorate the performance of the mixer, e. g. its dynamic range. This signal switches the semiconductor and a superposition of the two signals occurs thus leading to the production of sum and difference of the original frequencies. These signals are fed into…

The SSB filter

which is a commercial one (Supplier The reason why I don’t ladder filters anymore is that I found it extremely difficult (not to say impossible) to get a symmetric filter response curve thus making the lower and upper sideband of the receiver sounding different even when the carrier frequency has been adjusted very thoroughly.

The filter is used for the SSB transmitter as well. To ensure maximum signal separation between the two branches (tx and rx) and between filter input and output I again us a high quality rf relay made by Teledyne. When choosing a relay intercontact capacitance  is crucial. It should (if possible) be < 1 pF.

Don’t forget a clamp diode to VDD over the relay coil to eliminate high voltage voltage peaks generated by self inductance when the coil is switched off. Voltages up to 100 Volts can occur. This might damage the transmit-receive section of this transceiver that is equipped with semiconductors only and does not use a relay.

IF amplifier

This circuit is the same like that of the rf preamp. It also is part of the AGC chain, thus delivering another 25 to 30 dBs of gain swing so that overall gain swing is around 50 to 60dB. In practical research over a long period of observation I found that with an antenna delivering high signal voltage (Delta loop) it was not possible to overdrive the receiver  to a level where signal distortion was audible.

A tuned circuit is also placed here to increase gain. Tuned amplifiers usually have higher gain than broadband ones. It is highly recommended to ground the metal cans of the coil to prevent any self-oscillation. But as I found out, this amplifier is not very prone to go to self-oscillation state.

Product detector

Here again a dual gate MOSFET is used. The circuit is nearly the same like the RX mixer except from the output section. We can see a low pass filter here, consisting of 2 Cs (0.1uF) and a resistor (1k). You can use a radio frequency choke instead, 1mH is recommended.

Audio amplifier

This section consists of two parts, a preamp (with bipolar BC547) and a final amplifier (LM386 IC). It is well-known that this IC tends to oscillate. One measure to prevent this is to keep leads short, switch a low-pass filter (capacitor 100uF and R=33Ω) into the VDD line and to reduce the gain capacitor between pins 1 and 8 to a degree where self-oscillations terminate.

A switching transistor cuts off the audio line by short circuiting it when on transmit. This eliminates any noise when switching. The rx/tx switch now is 100% “click free”. A very pleasant way of operation. 😉


This is another re-use of a circuit I have frequently used before. It is desired to reduce its output voltage down to 0 volts when a more or less strong af signals appear at the input. The agc voltage is derived from the audio signal of the receiver. Some say that this is not the best choice because you need more time (an af cycle last much longer as an rf cycle) for the waveform to generate the regulating DC voltage.

Nonetheless I have never observed popping or unpleasant noise from incoming very strong signals. The agc response rate is so fast that you won’t notice that it just has regulated even when a strong signal comes in. Only with very, very strong signals a slight “plopp” sound is observable but it is not unpleasant.

A second capacitor can be switched in parallel to the 33uF one. This can either be done by a transistor switch (like shown in the schematic) that in this case is controlled by an output PIN of the MCU. An alternative that I found later is to use the MCU pin directly to switch the cap. When not using the additional cap you must switch the pin as an input so that there is no positive voltage from the pin to the circuit. When you intend to ground the transistor (agc in “slow” position) then the pin mus be set as output by defining the DDR-register respectively AND the pin must be set to 0. So you can get rid of the switching transistor.

Another possibility would be to derive the agc from the interfrequency signal. The problem that occurs in this case is that you have to decouple the local oscillator (bfo) very carefully from the place where agc circuit is placed. Otherwise you are at risk to detect the bfo signal by the agc which leads to reduced response range in the agc. In addition this receiver uses a higher rf voltage level for the mixers (2 to 3 Vpp each). By this the amount of stray energy is higher inside the circuit and thus this rf energy might be detected very early by the agc.

In the emitter line there is a resistor (68Ω) which produces a voltage drop when the transistor is driven. This is fed into the ADC of the microcontroller driving the S-meter display part.

The Transmitter

First the circuit:

DK7IH QRO SSB transceiver for 7MHz/40m - The Transmitter
DK7IH QRO SSB transceiver for 7MHz/40m – The Transmitter (Full sized image)

Microphone amplifier

This amplifier is a simple common-emitter circuit with the directly grounded emitter of the BC547 transistor. This circuit is linear only for low input voltages but suitable for the connected dynamic microphone since this does not produce more than some millivolts of audio energy. Bias comes from the 390kΩ resistor. At the input you find a 2.2nF capacitor from base to GND which helps to prevent coupling in rf energy from the transmitter to the audio stage and thus leading to an impure signal.

The DSB generator + amplifier

The amplified microphone signal is used to produce a double-sideband signal. The ic I use here is an antique but still available part by German manufacturer Siemens, the S042P. It includes a so-called “Gilbert-cell” mixer and an oscillator but the latter is not used here (Datasheet Application note (in German)).

The S042P mixer needs some more components compared to the well-known NE602 integrated circuit but fewer ones than the MC1496. It is designed for 12V usage, thus no voltage regulation is required.The ic can be applied in balanced mode or non-symmetrical. To save components I use the unbalanced circuit alternative. A slight loss in output power is acceptable in this case, there are amplifiers post each mixer in this transmitter.

Ic gain is about 16.5 dB, DC current is about 3 mA.

A crucial point is the signal level of the local oscillator. S042P needs only some hundred  millivolts of oscillator voltage. To prevent overdriving I experimented with different values of the coupling capacitor. 5.6pF seemed best because the LO produces some volts peak-to-peak.

Following there is an amplifier that is a standard circuit and has been tuned for maximum linearity in order to reduce distortion to a minimum (which is also true for the following stages). You can see the well understood 2 master ways of achieving max. linearity in an amplifier stage:

  • Negative feedback between collector and base (i)
  • Emmitter degeneration (II)


i) The first measure goes along with the 2.7kΩ resistor between collector and base of the transistor. This resistor provides positive dc bias voltage to the base and leads 90° out-of-phase ac voltage to the transistor’s input. This reduces gain and therefore distortion. But due to the fact that the whole transmitter strip has plenty of gain, this loss in gain is not a serious problem.

ii) The 10Ω resistor in the emmitter line is not bypassed by a capacitor. This stabilizes the circuit. When the current through transistor increases the emmitter voltage will rise (according to Ohm’s law) and the voltage between collector and emmitter drops. This reduces voltage difference between base and emmitter and hence also reduces gain.

The coupling to the next stage is done by a capacitor of 0.1uF. This causes some impedance mismatch. But that is as well not a big problem because the gain reduction here helps to prevent the whole transmitter from unwanted oscillations by diminishing overall gain.

TX mixer

Here the second S042P is used. The 9 MHz SSB signal is coupled to pin 13 of the ic, a DC connection is established to pin 11. These two pins represent the base connectors for the two current control transistors and should be bridged by a DC resistor in this circuit.

The 150Ω resistor from pin 10 and pin 12 to GND defines the gain of the mixer. Here you can use down to 150Ω but should have a resistor towards VDD to limit current and avoid excessive heating of the device. In this case another 150Ω is used.

VFO signal is coupled symmetrically to pins 7 and 8 via a small trifilar toroid. See schematic for details and please note that center tap is not used here. This is in contrast to the output transformer where the tap is used to feed supply voltage into the mixer.

Another 7 MHz band pass filter terminates the mixer, data for coils and capacitors is in the schematic.

Power amplifier

This amplifier has got 4 stages and except from the first one all are in push-pull mode. The power distribution for these 4 stages is as follows:

Stage Power
Preamp 5mW
Predriver 200mW
Driver 2.5 W
Final amp 50W


The first of the 4 power stages is the same as the post dsb generator amplifier so there is not more to add concerning this stage. Rf energy is taken out via a transformer with a primary and a tapped secondary winding. This is to provide the balanced structure necessary for the following push-pull stage.


This is the first push-pull stage. Its bias is derived from a voltage divider connected to the tap of the input transformer.

Please note: In contrary to the schematic I have installed 2 devices of the 2SC1973 type because the signal turned out to be much purer with these ones on the spectrum analyzer.

A tapped output transformer feeds the amplified rf energy to next board. Output impedance is 50Ω. The coupling to next stage then is done via a shielded cable of (nearly) the same impedance.

Driver stage

This one has an input transformer also center tapped. The tap goes to a bias network consisting of a current limiting resistor (1kΩ), two diodes forming the lower part of a voltage divider and some capacitors as part of a low pass filter to avoid coupling in of radio frequency (rf) energy. The two diodes must be thermally connected to the cases of the transistors. In case these heat up, the diode increases its conductivity thus reducing its resistance. The bias voltage drops and heating is stopped. So, thermal runaway is prevented.

For these two stages (predriver and driver) DC is fed through low pass filter (RFC and 2 caps 0.1uF) to prevent coupling of rf energy via the VDD line.

Final stage

This stage receives input from a balanced structure without a center fed transformer. Instead bias current is linked in via a network of radio frequency chokes and two resistors of 5.1Ω each.

Bias is provided by a current regulating transistor and should be set to about 100mA.

The MRF455 transistors are mounted directly to the aluminium structure of the sheet metal carrying the whole transceiver boards. When mounting them to the Veroboard I did not solder them directly. I used 1.6mm screws and washers to press the brass connectors to the copper strips of the amplifier board:

DK7IH QRO SSB transceiver for 7MHz/40m - Power amplifier underside
DK7IH QRO SSB transceiver for 7MHz/40m – Power amplifier underside

With this I could have been able to remove the precious transistors without having to unsolder them when the device might have turned out to be a failure. But it was not, thank God!

The output transformer is the one I have used in my old 14MHz PA and the ancestor of this radio. It is from an old ATLAS 215 transceiver and I hope that this will be the final place for the transformer.

Two temperature sensors (KTY-81-210) have been installed to measure the temperature of each transistor. They are connected to the microcontroller via voltage dividers (see schematic, please!)

Low Pass Filter and Power Measurement Unit

For the low pass filter I use 2 toroids T50-2. These might appear small but from one source (that I have forgotten) I remember to have found that for 50 watts of power this core is still suffice. Metal powder cores can stand much more power compared with same sized ferrite toroids.

The power measurement unit consists of a network that starts with a resistor of 12kΩ to ensure a significant voltage drop in signal level, then two rectifier diodes (1N1418 or equivalent) follow, some low pass filtering eliminating the last rf energy and the resulting direct current voltage is fed to a variable resistor to set an adequate voltage level for the ADC in the microcontroller.

The rf output made out of a two-tone audio signal measured at the antenna connector:

DK7IH QRO SSB transceiver for 7MHz/40m - Two tone signal, power about 57 watts, close to overdrive
DK7IH QRO SSB transceiver for 7MHz/40m – Two tone signal, power about 57 watts, close to overdrive

The spectroscopical analysis shows the signal on the f -> V figure:

DK7IH QRO SSB transceiver for 7MHz/40m - Output spectrom with max. Pout (>50W PEP)
DK7IH QRO SSB transceiver for 7MHz/40m – Output spectrum with max. Pout (>50W PEP)


A very simple circuit. Two PNP power transistors are used but they don’t have that much to do. They are only designed for switching the low-power parts of the radio. The high current to the drivers and final amplifiers is permanently present in the collector lines but the bias lines are tx/rx-switched and go to 0V during receive periods. This reduces requirements for the power rating of the switch board.

DK7IH QRO SSB transceiver for 7MHz/40m - RX/TX switch board.
DK7IH QRO SSB transceiver for 7MHz/40m – RX/TX switch board.

When pushing the PTT the base of the lower transistor is pulled to GND. So it becomes conductive and TX DC is applied. Via the diode the upper transistor loses its negative voltage and becomes non-conductive.


The Backlight

One interesting thing was the blue backlight to illuminate the front panel controls. It is made using SMD LEDs that are soldered to small pieces of Veroboard and fixed with 2-component glue to transparent light-scattering plastic bought from a local supplier for architects and designers. This material is used for making models of houses and stuff like that. As light distributor this material is excellent. The LEDs are powered by a linear transistor connected to the pulse width modulation (PWM) output of the microcontroller so that light intensity is adjustable.

Hint: When programming the PWM functions it might occur that PWM frequency is audible in the receiver. If something like that occurs another frequency can be selected without changing the performance as soon as it is high enough that human eyes aren’t able to recognize a flickering.

DK7IH QRO SSB transceiver for 7MHz/40m
DK7IH QRO SSB transceiver for 7MHz/40m

The covers used for the labels and the LCD shield are made from 2mm acrylic and fixed with screws of 1.6 respective 2mm diameter.

The two push-buttons right in top position consist of two bars of acrylic (4.2mm diameter) and are having mechanical contact to small spring-loaded switches behind the front panel:


Directly under these acrylic bars there are two LEDs shining into these rods and because of total reflection inside the tubing the optic conductor is sending the light to the front side when the LEDs are powered on. That is how it looks at night:



General setup

This is a sandwich construction again. On the first side there is the DDS  board (left), the receiver (center) TX mixer and preamplifier (right) and the SSB generator (back). Also there is a 5 lead connector holding the 5 ISP lines (MOSI, MISO, CLK, RESET and GND). This makes firmware updates easy because you don’t have to open the case when you want to update software.

DK7IH QRO SSB transceiver for 7MHz/40m - DDS, RX, TX mixer and SSB generator
DK7IH QRO SSB transceiver for 7MHz/40m – DDS, RX, TX mixer and SSB generator

The other side holds the TX low pass filter plus power measurement unit (left), the power amplifier (center) and the predriver and driver (right). In the back you can see the rx/tx switch board:

DK7IH QRO SSB transceiver for 7MHz/40m - TX LPF, PA, Drivers, RX/TX switch board.
DK7IH QRO SSB transceiver for 7MHz/40m – TX LPF, PA, Drivers, RX/TX switch board.

“On the air”

Again big fun this transceiver! During the ARRL DX contest last weekend I could work some statesiders. With Delta Loop and 50 watts, fairly OK. Working Europe all day is no problem with 50 watts.

During the first QSOs I had reports that the audio sounded clear but somehow “narrow”. I had used an electret mike that time and could not use a dynamic one because the preamplifier following the microphone did not have enough gain. Then, to solve this problem, I decided to do a full reconstruction of the SSB generator board. The one then had used had an AN612 mixer integrated circuit (from an old CB radio). This one was dismantled and replaced by the S042P board. The change took me 3 hours to develop and solder but it paid. I use a Motorola dynamic microphone now that has a very rich and clean sound. I monitored it on a web based SDR receiver, made a recording and found it to be OK.

OK, dear fellow hams, that’s the story so far, some supplements will sure be made, so stay tuned!

Thanks for reading and vy 73 de

Peter (DK7IH)


Programming the AD9834 DDS chip

This is a software project for building a VFO with the 75MHz clocked AD9834 synthesizer chip by Analog Devices. Due to the Nyquyst theoreme with a maximum clock rate of 75 MHz a frequency of 37.5 MHz can be achieved. When overclocking the chip to 100 MHz (which has been succesfully tested in many cases) the maximum output frequency theoretically rises up to 50 MHz. But when coming close to these boundaries signal quality deteriorates severely. So it is recommended not to produce higher output frequencies than 25 MHz (75 MHz clock) or respectively 33 MHz (100MHz clock).

Theoretical outline

The AD9834 is a low power (20mW power consumption when VDD=3.3V) DDS module. It can handle up to 5.5 V as VDD (2.3V min.), so 5V single supply use makes circuitry simple. It comes in a 20 lead TSSOP case, breakout boards are available.

SPI signal structure

Programming a desired frequency into the DDS chip is performed by a 3 line communication, a serial peripheral interface (SPI). These three lines are called

  • SCLK (the clock signal)
  • FSYNC (the signal that determines the end of the transfer of a single word (16 bits)
  • SDATA (the frequency or control information packed in 16 bit word)

The timing diagram found in AD’s datasheet gives the precise structure of the signal communication:

AD9834 DDS SPI Timing diagram
AD9834 DDS SPI Timing diagram

FSYNC is  high when the first word (16 bits) is going to be transferred. SCLK is also high in this moment. Then FSYNC is set low, 16 bits subsequently are transmitted via the SDATA line. After one bit has been transmitted, SCLK is set low for 10 ns minimum and then goes high again for the next bit. Transfer starts with MSB (D15).

After 16 bits have been transmitted, FSYNC is set high again, showing the DDS chip that the word has been completely transferred. As soon a FSYNC is low again the DDS is ready for the transmission of the next 16 bits.

The DDS chip “language”

Frequency set

The chip has two frequency registers (FREQ0 and FREQ1). These registers contain 28 bits of frequency information. They can be addressed individually and are divided into two 14-bit sections each (MSB and LSB). In addition it is possible to load the LSB independently from the MSB if only a minor frequency change is required.

Frequency registers are selected by the first two MS-bits (DB15 and DB14) of a 16 bit structure sent to the DDS. “01” determines a frequency load for FREQ0, “10” loads the FREQ1 register.

Control transmission

Besides the frequency information some controls must be sent to the DDS chip. A control is also 16 bits wide. A control is initiated by a “00” starting sequence for DB15 and DB14.


So we can distinguish the purpose of a word by its first two bits:

  • “01” + 14 following bits loads the FREQ0 register,
  • “10” + 14 following bits loads the FREQ1 register,
  • “00” + 14 following bits transfers a control word.

One important control bit under the looking glass

There are many features to control the AD9834 chip. We want to limit this to the absolute basics. The most important bit is DB13. If you set this to “1” the chip is informed that the frequency information for the register to be loaded next will come in two consecutive 16 bit words addressing the respective frequency register with the 14 + 14 bits of frequency information.

So the first step is to transfer the “00” signaling a control code and next the “1” signaling that the user wants to write two 16 bit words for changing the frequency. The rest of the 16 bits of this control can be left “0”. This results in

“0010000000000000” (0x2000)

is the first word to be transmitted.

Frequency calculation and transfer

The frequency data of the waveform the user wants the chip to put out is determined by 28 bits, a so called “frequency word”. The formula is

frequency word = 2^28 / fclk * f

  • frequency word: a floating point number that will later be converted into a long integer containing the frequency information for the chip,
  • fclk: The master clock rate of the clock oscillator connected to the DDS [Hz],
  • f: The frequency the user wants to be generated [Hz].


With a clock rate of 75 MHz a user frequency of 1 MHz would be calculated as a frequency word of

268435456 / 75000000 * 1000000 = 3579139,413333333

By leaving only the integer part of the number we get 3579139 which now is the frequency word that must be transferred to the chip.

Converted to binary this number figures out as


This is now split into two parts, 14 bits each:

0000110110100 1110100000011

Now we must tell the DDS in which of the two frequency registers we want to store this. Therefore we add the 2-digit-code for the desired frequency register in front of the respective number. In this example the destination is FREQ0, so we add “01”. The result are two words of 16 bits each:

010000110110100 011110100000011

Together with the control that allows us to write the 2 words consecutive into the chip we get a complete sequence of

0010000000000000 011110100000011 010000110110100

because the correct order is CONTROL first, then LSB, and MSB last. In HEX this is 0x2000, 0x3D03, 0x21B4.


Code examples in C for the AVR family follow. First the declarations, then some defines in advance so that you can adapt the code easily to your layout:

//Declarations SPI for DDS
void spi_start(void);
void spi_send_bit(int);
void spi_stop(void);
void set_frequency2(unsigned long);
// Defines SPI DDS (AD9834)
#define DDS_FSYNC 1   //PC0
#define DDS_SDATA 2   //PC1 
#define DDS_SCLK 4    //PC2
#define DDS2_RESETPIN 3  //PC3

Before a transfer starts we need to send a “start” command to the SPI to set SCLK and FSYNC adequately. This is coded as:

void spi_start(void)
    DDS_PORT |= DDS_SCLK;     //SCLK hi
    DDS_PORT &= ~(DDS_FSYNC); //FSYNC lo

After a word has been transmitted this mus be shown with the “stop” command to inform the chip that 16 bits have been sent. So we set FSYNC to high:

void spi_stop(void)

With these two functions we can initiate and terminate the transfer of 16 bits of data to the chip.

Next we must learn how to transfer data. This will be done by sending just one bit to the DDS and afterwards switching the clock accurately:

void spi_send_bit(int sbit)
        DDS_PORT |= DDS_SDATA; //SDATA hi
        DDS_PORT &= ~(DDS_SDATA); //SDATA lo
    DDS_PORT &= ~(DDS_SCLK); //SCLK lo

And now for computing and sending the frequency word:

void set_frequency2(unsigned long f)
    double fword0;
    long fword1, x;
    int l[] = {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
    int m[] = {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, t1;

    fword0 = (double) 3.579139413 * f; // 3.579139413 = 268435456 / 75000000
    fword1 = (long) fword0;

    //Transfer frequency word to byte array
    x = (1 << 13); //2^13
    for(t1 = 2; t1 < 16; t1++)
        if(fword1 & x)
            l[t1] = 1;
        x >>= 1;

    x = (1L << 27); //2^27
    for(t1 = 2; t1 < 16; t1++)
        if(fword1 & x)
            m[t1] = 1;
        x >>= 1;

    //Transfer to DDS
    //Send start command
    for(t1 = 15; t1 >= 0; t1--)
        spi_send_bit(0x2000 & (1 << t1));

    //Transfer frequency word 
    for(t1 = 0; t1 < 16; t1++)

    for(t1 = 0; t1 < 16; t1++)

I use a set of 2 arrays as predefined words including the start sequence for FREQ0 and then writing each single bit into the respective array.

To start the DDS correctly a short reset sequence should be placed in your main()-function:

//Reset DDS (AD9834) 
DDS_PORT |= (1 << DDS_RESETPIN); //Bit hi
DDS_PORT &= ~(1 << DDS_RESETPIN); //Bit lo

Alternative: Tie the RESET-Pin of the AD9834 permanently to GND. Notable that also a software rest is possible, but I prefer the hardware method.

By set_frequency(Value) you can start using this DDS.

73 de Peter (DK7IH)

A Micro Multibander – Step by step (Part III): The Receiver (Overview)

Work is in progress. The recent weeks I finished all the 6 modules that are going to be the receiver:

  • Band pass filter section
  • Relay switches for switching the BPFs
  • RF preamp, RX mixer and IF preamp
  • IF main amp
  • Product detector and AF amp section
  • AGC unit

Mounted together to an aluminium carrier board it looks like this:

Receiver board for Micro Multiband QRP SSB TRX (C) DK7IH 2018
Receiver board for Micro Multiband QRP SSB TRX (C) DK7IH 2018

On the picture the board is not equipped with the neccessary wiring yet to give the reader more sight on the single circuits. Next I will draw a schematic of each board to point out the used circuitry for those who want to build this or a similar receiver.

First test are promising so far, the receiver is sensitive, has a very low noise figure (due to dual gate MOSFETs in the preamp and the two main IF amp stages) and has shown no problems to cope with high out-of-band broadcaster signals on the 40 meter band which is due to the SBL-3 mixer I have used that has a good IM3 performance..

Thanks for watching an 73 de Peter (DK7IH)

A Micro Multibander – Step by step (Part II): VFO and Front Panel

In the last entry about my new project, a micro multibander for QRP SSB HF use, I referred on the circuits of the Si5351 VFO, the microcontroller, OLED module an the other digital circuits controlling the transceiver.

This is the practical side, now: All the digital circuits are placed behind the front panel. This is for practical (to save space in the main cabinet) and electronic reasons. By keeping the digital leads as short as possible you make it is easier avoiding hum, noise and other unwanted radio signals penetrating into your analog circuits, mainly the reciever.

This is how the front section looks from the user side:

Front panel of a SSB QRP micro multiband transceiver for SSB (C) 2018 DK7IH)
Front panel of a SSB QRP micro multiband transceiver for SSB (C) 2018 DK7IH)

The 3 potentiometers on the left (still awaiting suitable knobs) are for audio volume, receiver gain and mic gain. A switch will allow to switch the AGC from fast to slow. The S-meter has been taken from an old CB mini radio. All does not fit that much, some mechanical work still has to be done. 😉

Front panel of a SSB QRP micro multiband transceiver for SSB (C) 2018 DK7IH)
Front panel of a SSB QRP micro multiband transceiver for SSB (C) 2018 DK7IH)

This is the module taken from the side. All electronic stuff is mounted onto a 8cm x 6cm double sided veroboard. I use M2 spacers of various lengths to keep the “subboards” in place, like the Si5351 breakout, that you can see in the middle of the picture. These spacers are available from Chinese vendors on ebay and help a lot to build very compact electronic stuff. All joints and bolts are kept in M2, too.

The module is finished with a 1.5mm aluminium board where the plugs for the connectors are fed through. These connectors will be equipped with home-made plugs (1″ technology) and then connected to the respective parts of the analog circuits like receiver or transmitter.

Front panel of a SSB QRP micro multiband transceiver for SSB (C) 2018 DK7IH)

Here is another view of the lateral arrangement: The old-style S-meter stripped from an old HANDIC-brand CB radio was purchased on ebay for a few Euros. There ist still a lot of old CB stuff there, giving enthusiast homebrewers a large stock in interesting electronic and radio-related material.

(To be continued)

A very compact SSB transceiver for 40 Meters with 50 watts of output power (Overview and block diagram)

In my last article I talked about my ideas fo a new transceiver project beyond the QRP level. First pictures of cicuitry were also shown. In the meanwhile the transceiver has been finished, some minor changes had to be made and now it’s time to go to the details.

All construction objectives (compact size, sufficient output power to establish even DX contacts on 40 meters, good stability, good receive performance, rigidness for outdoor use) have been met so far as I can say. I had the rig with me, when I was on vacation on the Island of Jersey (GJ/DK7IH/P) from 12th to 19th of August this year. It was big fun operating the rig. Lots of stations were calling during the two days when I was on 40 meters. ODX was HL1AHS, OM Kun from Seoul. So, this was very nice for 50 watts and a vertical antenna made of a fishing rod.

First, to give an overview, let’s have a look on the completed transceiver. Cabinet size is 7.5 x 16 x 6 centimeters.

SSB transceiver for 40 Meters with 50 Watts of output
SSB transceiver for 40 Meters with 50 Watts of output
SSB transceiver for 40 Meters with 50 Watts of output
SSB transceiver for 40 Meters with 50 Watts of output power (by DK7IH)

As you can see, the rig is very compact in size. The block diagram gives you an overview what is inside. Receiver section is on top, DDS can be found in the center and the transmitter is sited at the bottom of the diagram. As you can see, it’s again not rocket science and SDR-virus could not strike as well. 😉

SSB transceiver for 40 Meters with 50 Watts of output (Block diagram)
SSB transceiver for 40 Meters with 50 Watts of output (Block diagram)

The next posts will describe the rig in details step by step. Proceed with the receiver’s front end.

73 de Peter

An ultra compact QRO transceiver for 40 Meters with 50 to 70 watts output power

On one hand sunspot cycle is on the decline. Conditions on the higher bands tend to deteriorate gradually. On the other hand I wanted a very compact transceiver for outdoor (particularly holiday) activities. Besides this and due to the fact that I prefer monoband operation when on tour, the potentially ideal band had to be found. Based on these prerequisites I made up my band to go to 40 meters for this project.

Some interesting concepts for QRP-transceivers for this band can be found on the web. The “Santerre” and the “ILER40” should be mentioned. These operate with power levels of about 5 watts which I thought should not be enough in most of the situations. My opinion is, that on 40 meters it’s not the best decision to operate on the standard QRP watt level, e. g. like the mentioned before and my other rigs have been designed for. With high probability you’re about to get lost in the naturally higher band noise and QRM that is around on 7 MHz. Thus, 50 to 70 watts possibly should be a more suitable power level to operate on.

Basic concept

From the electronic point of view this transceiver doesn’t involve very much new stuff. The 4-stage transmitter with push-pull driver and final from my multi-band rig with emitter degeneration circuitry in every stage to improve linearity but without negative feedback in this circuit. Some NE612/SA602-mixers in receiver and transmitter, MC1350 as the rx’s if-amplifier, LM 386 as audio amplifier, busines as usual. DDS with AD 9551 for frequency generation. No fuss, no SDR-stuff. “Old school” homebrewing. Not more, but not less.

The challenge this time was to increase package density once more to an achievable maximum. The maximum size I wanted to have was the size of a carton of cancer sticks, also known as “cigarettes”.

Another problem of the project was to get a high power rf amplifier with an output level very much beyond standard QRP and avoiding any unwanted coupling, parasetic oscillations etc.  even when components are very densly packed. A clean signal is a must, not of the package size.

Construction principles

The center of the construction is made of the aluminium carrier of the 50 to 70 watts final that is in the center of a three layer arrangement consisting of

  • receiver board
  • rf power amplifier
  • rf board with SSB generator, tx mixer, pre-amp, pre-driver and driver (push-pull).

The parts of this assembly:

The main frame carrying all the other stuff:

Dissambled mounting frame of QRP transceiver for 40 meters (2016 by DK7IH)

Dissambled mounting frame of QRP transceiver for 40 meters (2016 by DK7IH)

The aluminium plane centered will keep the PA 50 to 70 watts board. This one is equipped with two MRF455 rf power transistors made by Motorola.

Power amplifier for QRO transceiver 40 meters (by DK7IH)
Power amplifier for QRO transceiver 40 meters (by DK7IH)

Above and below this board the receiver and transmitter boards are mounted to a three layer package.

Receiver board for 40 meter QRO transceiver (by DK7IH)
Receiver board for 40 meter QRO transceiver (by DK7IH)
 Transmitter board for 40 meter QRO transceiver (by DK7IH)

Transmitter board for 40 meter QRO transceiver (by DK7IH)

These 3 boards are stacked and plugged into the front unit that you can see underneath. The front subassembly is formed of

  • the front panel with user controls, microphone socket and LCD
  • the DDS system and
  • the relay switching board.
Front unit of 40 meter QRO transceiver (by DK7IH)
Front unit of 40 meter QRO transceiver (by DK7IH)

Both construction groups are joined in an angle of 90° by a set of plugs and sockets so that they can be put apart easily and fast for service or improvements. All boards are made of 5×7 cm “FR4” material Veroboards.

QRO transceiver for 40 meters fully assembled (by DK7IH)
QRO transceiver for 40 meters fully assembled (by DK7IH)

In the center of the right board package you can see the PA amplifer, capable of delivering 50 to 70 watts SSB signal, on top the rx board, at the bottem the transmitter board.

Thermal considerations

An important issue for a high power transceiver is the transmitter’s final amplifier. Particularly thermal conductivity should be kept in mind. In this case one problem, I thought, might occur because the power transistors are not mounted directly to the rear panel of the transceiver where heat can be lead to the outside easily. Here, the two MRF455s are sited in the center of the sandwich construction holding the 3 main rf boards. But as this transceiver is for voice operation only with its comparatively low duty cycle of 10 to 20%, this was not considered as an unsolvable problem. But thermal aspects must be kept in mind, anyway.

Practical solution

As you can see, the final transmitter stage is based on an aluminium sheet metal of 2 mm thickness. Under the board there is a second layer also of 2 millimiter thickness aluminium. By the rear end it is joined to a solid piece of square shaped aluminium rod that itself is connected to another two thick layers of alumium which are srewed to the rear panel holding a heat sink. For this heat sink I’m currently searching a more massive one.

Practical outcomes

The thermal test was a longer QSO with Dave, M5AFD . During this longer QSO with transmission times of up to 3 to 4 minutes each the center alu panel got a temperature of 60° to 65° centigrade. Thermal stress? Not worth mentioning yet!

Current state

So far I’ve done about 50 QSOs on 40 meters with this rig, gradually improving some things. Later I will publish the detailed scheme as soon as it is finished. By now prospects are good to bring this compact QRO transceiver with me on a holiday trip to Jersey Island planned this summer.

Stay tuned! 73 de Peter (DK7IH)


Read next chapter of transceiver description

Improving spurious emissions performance in QRP transceiver DDS VFO: Replacing AD9850 by AD9951

The next step in improving my homemade QRP multiband transceiver was to reconstruct the DDS VFO. This was not urgently neccessary but after some months of continously operating the rig I was not 100%  satisfied with the spurious performance of the AD9850. The AD9850 is a DDS device with only a 10-bit digital-analog-converter (DAC). These ones tend to put out still a quite high number of spurious emissions aka “birdies”.”Birdies” then are detected in the receiver causing unpleasant beep tones.

The AD9951 DDS module (some general information)

Analog Devices (AD) also offers more professional DDS-chips with a better performing 14-bit DAC. The AD9951 is such a device.  It is offered for about 25 USD by and other vendors. It is also used in commercial ham band transceivers thus we can deduce that performance is improved compared to the cheaper DDS devices made by AD.

The AD9951 needs multi supply voltages, i. e. 3.3V and 1.8V. Digital inputs are 5V-compatible if 3.3V as D_VDD_IO input voltage is applied. The device can be clocked up to 400Mhz. If you use a clock generator with lower frequency, an internal clock multiplier can be used. But this deteriorates phase noise to a certain degree. For my VFO which works in the range only from 13 to 20 MHz I use a simple standard 5V 120MHz clock generator and I do not use the internal clock multiplier. To make the clock oscillator’s output 1.8V compatible a simple voltage divider has been applied.

Note that performance concerning phase noise of the DDS also depends on the voltage of the clock generator. The lower it is, the more the phase noise performance will deteriorate. To calculate exact configuration of your voltage divider keep in mind that input impedance (1.5 kΩ according to datasheet) and input capacitance (3pF) are paralleled. Input capacitance causes reactance depending on the input frequency given by the following equation:

Output circuit

As usual for me the DDS output consists of a balanced-to-unbalanced broadband transformer followed by an rf amplifier. For the latter one I use the MAV-11 broadband amplifier made by Minicurcuits.

This the circuit of my improved DDS device:

AD9951 based DDS VFO for QRP multiband transceiver (Peter Rachow, DK7IH, 2016)
AD9951 based DDS VFO for QRP multiband transceiver (Peter Rachow, DK7IH, 2016) Click for FULL size image!


The first impression when I connected the AD9951-DDS to my HP 8558B spectrum analyzer was that the signal looked different compared to a AD9850 generated signal. I’m very sorry, but so far I’ve got no photos but I’m planning an article that will deal with DDS comparisons which will have photos of the spectrographic analysis of the various signals. But it was visible on the first sight, that the signal looked much cleaner than a one produced by a DDS with 10-bit-DAC.

OK, there were much lower sidetones to the main signal on the spectrum analyzer. Measurements are one side of the medal, but how would the DDS perform in the receiver? It approved to have improved when I installed the new DDS into the transceiver and listened to the bands. “Birdies” have vanished to nearly 100%, only some very weak spots are discernable. And the receiver noise also seems to have lowered by a certain degree. But I don’t have measured that so far. Measurements are still to be done. OK, let’s check it out the following days (20 meter is very quiet today!) and then I will be able to say if and how the 14-bit DAC.

So, if you want to get the best performance (low number of spurs, low phase noise) out of the AD9951, here are some basic hints:

  • Stay away far from the Nyquist-Frequency of the chip! Basically this is one third (33%) of the clock rate. I recommend to lower this down to one fifth. So, if you use a clock rate of 100 MHz, don’t let the DDS produce more than 20 MHz!
  • Don’t use the internal clock multiplier! Use a clock generator with the highest possible frequency!
  • Use a clock generator that will put out 1.8 Volts pp!
  • Keep ground leads on your pcb as wide and short as possible!
  • Decouple AVDD, DVDD and DVDD_I/O effectively!
  • Set DAC_RSET to a value that DAC current stays lower than 10mA. 3.9k is a recommended value.


Practical implementation

The DDS is mounted to a small piece of veroboard using a 48-lead breakout-board for TQFP48 ICs:

DDS module with AD9951 mounted on a small veroboard (C) DK7IH 2016
DDS module with AD9951 mounted on a small veroboard (C)  DK7IH 2016

Flexible wiring is used to connect the board to the microcontroller. Shielded cable is mandatory for connecting the rf feed to tx and rx mixers.

Underneath you’ll find some code snippets to set the frequency of the AD9951 device. The code has been copied 1 by 1 from my SSB transceiver’s software. Thus modification for your purposes might be neccessary.

After inspiring discussion with a reader of my blog I’ve changed the routines to optimize code concerning performance. The major objective was to avoid intense use of floating point functions because they are slow. Instead I used bitshift operations widely. But there is one floatingpoint calculation left:

fword = (unsigned long) frequency * 35.790648;

The floatingpoint constant 35.790… results from a division of 0xFFFFFFFF by f_clock which is given by the equation of the tuning word (see datasheet of AD9951). This could be converted to a bitshift operation too, if you use a programmable clock oscillator tuned to 134,217,727 Hz. Then the multiplication factor is 32 which can be easily achieved with another bitshift operation.

Thanks for reading!

Peter (DK7IH)

Setting the AD9951’s frequency output

void set_frequency(unsigned long frequency)
    //PORT usage
    // FQ_UD:  PD0 (green)
    // DATA:   PD1 (white)
    // CLK:    PD2 (blue)
    // RESET:  PD3 (pink)

    unsigned long fword;
    int t1, shiftbyte = 24, resultbyte;
    unsigned long comparebyte = 0xFF000000;
    //Calculate frequency word
    //Clock rate =  120002500
    //0xFFFFFFFF /  120002500 = 35.790....
    fword = (unsigned long) frequency * 35.790648;
    //Initiate transfer to DDS
    PORTD &= ~(1); //FQ_UD lo
    //Send instruction bit to set fequency by frequency tuning word
    //Calculate and transfer the 4 bytes of the tuning word
    //Start with msb
    for(t1 = 0; t1 < 4; t1++)
        resultbyte = (fword & comparebyte) >> shiftbyte;
        comparebyte >>= 8;
        shiftbyte -= 8;       
    //End transfer sequence
    PORTD |= 1; //FQ_UD hi

//Send one byte to DDS 
void spi_send_byte(int sbyte)
    // PORT usage     
    // FQ_UD:  PD0 (green)     
    // DATA:   PD1 (white)
    // CLK:    PD2 (blue)     
    // RESET:  PD3 (pink)     

    int t1, x = 0x80;          
    for(t1 = 0; t1 < 8; t1++)     
        //SCLK lo         
        PORTD &= ~(4);          //Bit PB2 set to 0
        //Set respective bit to 0 or 1         
        if(sbyte & x)       
             PORTD |= 2;  //SDATA Bit PB1 set to 1         
             PORTD &= ~(2);  //SDATA Bit PB1 set to 0         
        //SCLK line set to 1 // = set clock line to RISING edge to store bit in frequency word         
        PORTD |= 4;  //Bit PB2 set to 1                  
        x >>= 1; //Shift bit to divide x by 2     

Resetting the AD9951-chip:

(A reset must be performed once immediately after your program was started and before you

transmit the first instruction to the AD9951 DDS chip)

void reset_ad9951(void)
    //PORT usage
    // FQ_UD:  PD0 (green)
    // DATA:   PD1 (white)
    // CLK:    PD2 (blue)
    // RESET:  PD3 (pink)
    PORTD |= 0x08; //Bit PD3 set 
    _delay_ms(1); //Hold reset line hi for at least 20ns. 
     PORTD &amp;= ~(0x08); //Bit PD3 erase 

(C) 2016 DK7IH (Peter Rachow)