Programming the AD9834 DDS chip

This is a software project for building a VFO with the 75MHz clocked AD9834 synthesizer chip by Analog Devices. Due to the Nyquyst theoreme with a maximum clock rate of 75 MHz a frequency of 37.5 MHz can be achieved. When overclocking the chip to 100 MHz (which has been succesfully tested in many cases) the maximum output frequency theoretically rises up to 50 MHz. But when coming close to these boundaries signal quality deteriorates severely. So it is recommended not to produce higher output frequencies than 25 MHz (75 MHz clock) or respectively 33 MHz (100MHz clock).

Theoretical outline

The AD9834 is a low power (20mW power consumption when VDD=3.3V) DDS module. It can handle up to 5.5 V as VDD (2.3V min.), so 5V single supply use makes circuitry simple. It comes in a 20 lead TSSOP case, breakout boards are available.

SPI signal structure

Programming a desired frequency into the DDS chip is performed by a 3 line communication, a serial peripheral interface (SPI). These three lines are called

  • SCLCK (the clock signal)
  • FSYNC (the signal that determines the end of the transfer of a single word (16 bits)
  • SDATA (the frequency or control information 16 bit words)

The timing diagram found in AD’s datasheet gives the precise structure of the signal communication:

AD9834 DDS SPI Timing diagram
AD9834 DDS SPI Timing diagram

FSYNC is  high when the first word (16 bits) is going to be transferred. SCLK is also high in this moment. Then FSYNC is set low, 16 bits subsequently are transmitted via the SDATA line. After one bit has been transmitted, SCLK is set low for 10 ns minimum and then goes high again for the next bit. Transfer starts with MSB (D15).

After 16 bits have been transmitted, FSYNC is set high again, showing the DDS chip that the word has been completely transferred. As soon a FSYNC is low again the DDS is ready for the transmission of the next 16 bits.

The DDS chip “language”

Frequency set

The chip has two frequency registers (FREQ0 and FREQ1). These registers contain 28 bits of frequency information. They can be addressed individually and are divided into two 14-bit sections each (MSB and LSB). In addition it is possible to load the LSB independently from the MSB if only a minor frequency change is required.

Frequency registers are selected by the first two MS-bits (DB15 and DB14) of a 16 bit structure sent to the DDS. “01” determines a frequency load for FREQ0, “10” loads the FREQ1 register.

Control transmission

Besides the frequency information some controls must be sent to the DDS chip. A control is also 16 bits wide. A control is initiated by a “00” starting sequence for DB15 and DB14.

Summary

So we can distinguish the purpose of a word by its first two bits:

  • “01” + 14 following bits loads the FREQ0 register,
  • “10” + 14 following bits loads the FREQ1 register,
  • “00” + 14 following bits transfers a control word.

One important control bit under the looking glass

There are many features to control the AD9834 chip. We want to limit this to the absolute basics. The most important bit is DB13. If you set this to “1” the chip is informed that the frequency information for the register to be loaded next will come in two consecutive 16 bit words addressing the respective frequency register with the 14 + 14 bits of frequency information.

So the first step is to transfer the “00” signaling a control code and next the “1” signaling that the user wants to write two 16 bit words for changing the frequency. The rest of the 16 bits of this control can be left “0”. This results in

“0010000000000000” (0x2000)

is the first word to be transmitted.

Frequency calculation and transfer

The frequency data of the waveform the user wants the chip to put out is determined by 28 bits, a so called “frequency word”. The formula is

frequency word = 2^28 / fclk * f

  • frequency word: a floating point number that will later be converted into a long integer containing the frequency information for the chip,
  • fclk: The master clock rate of the clock oscillator connected to the DDS [Hz],
  • f: The frequency the user wants to be generated [Hz].

Example

With a clock rate of 75 MHz a user frequency of 1 MHz would be calculated as a frequency word of

268435456 / 75000000 * 1000000 = 3579139,413333333

By leaving only the integer part of the number we get 3579139 which now is the frequency word that must be transferred to the chip.

Converted to binary this number figures out as

00001101101001110100000011

This is now split into two parts, 14 bits each:

0000110110100 1110100000011

Now we must tell the DDS in which of the two frequency registers we want to store this. Therefore we add the 2-digit-code for the desired frequency register in front of the respective number. In this example the destination is FREQ0, so we add “01”. The result are two words of 16 bits each:

010000110110100 011110100000011

Together with the control that allows us to write the 2 words consecutive into the chip we get a complete sequence of

0010000000000000 011110100000011 010000110110100

because the correct order is CONTROL first, then LSB, and MSB last. In HEX this is 0x2000, 0x3D03, 0x21B4.

Coding

Code examples in C for the AVR family follow. First the declarations, then some defines in advance so that you can adapt the code easily to your layout:

//Declarations SPI for DDS
void spi_start(void);
void spi_send_bit(int);
void spi_stop(void);
void set_frequency2(unsigned long);
// Defines SPI DDS (AD9834)
#define DDS_PORT PORTC 
#define DDS_FSYNC 1   //PC0
#define DDS_SDATA 2   //PC1 
#define DDS_SCLK 4    //PC2
#define DDS2_RESETPIN 3  //PC3

Before a transfer starts we need to send a “start” command to the SPI to set SCLK and FSYNC adequately. This is coded as:

void spi_start(void)
{
    DDS_PORT |= DDS_SCLK;     //SCLK hi
    DDS_PORT &= ~(DDS_FSYNC); //FSYNC lo
}

After a word has been transmitted this mus be shown with the “stop” command to inform the chip that 16 bits have been sent. So we set FSYNC to high:

void spi_stop(void)
{
    DDS_PORT |= DDS_FSYNC; //FSYNC hi
}

With these two functions we can initiate and terminate the transfer of 16 bits of data to the chip.

Next we must learn how to transfer data. This will be done by sending just one bit to the DDS and afterwards switching the clock accurately:

void spi_send_bit(int sbit)
{
    if(sbit)
    {
        DDS_PORT |= DDS_SDATA; //SDATA hi
    }
    else
    {
        DDS_PORT &= ~(DDS_SDATA); //SDATA lo
    }
    DDS_PORT |= DDS_SCLK; //SCLK hi
    DDS_PORT &= ~(DDS_SCLK); //SCLK lo
}

And now for computing and sending the frequency word:

void set_frequency2(unsigned long f)
{
    double fword0;
    long fword1, x;
    int l[] = {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
    int m[] = {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, t1;

    fword0 = (double) 3.579139413 * f; // 3.579139413 = 268435456 / 75000000
    fword1 = (long) fword0;

    //Transfer frequency word to byte array
    x = (1 << 13); //2^13
    for(t1 = 2; t1 < 16; t1++)
    {
        if(fword1 & x)
        {
            l[t1] = 1;
        }
        x >>= 1;
    }

    x = (1L << 27); //2^27
    for(t1 = 2; t1 < 16; t1++)
    {
        if(fword1 & x)
        {
            m[t1] = 1;
        }
        x >>= 1;
    }

    //Transfer to DDS
    //Send start command
    spi_start();
    for(t1 = 15; t1 >= 0; t1--)
    {
        spi_send_bit(0x2000 & (1 << t1));
    }
    spi_stop();

    //Transfer frequency word 
    //L-WORD
    spi_start();
    for(t1 = 0; t1 < 16; t1++)
    {
        spi_send_bit(l[t1]);
    }
    spi_stop();

    //M-WORD
    spi_start();
    for(t1 = 0; t1 < 16; t1++)
    {
        spi_send_bit(m[t1]);
    }
    spi_stop();
}

I use a set of 2 arrays as predefined words including the start sequence for FREQ0 and then writing each single bit into the respective array.

To start the DDS correctly a short reset sequence should be placed in your main()-function:

//Reset DDS (AD9834) 
_delay_ms(10); 
DDS_PORT |= (1 << DDS_RESETPIN); //Bit hi
_delay_ms(10); 
DDS_PORT &= ~(1 << DDS_RESETPIN); //Bit lo
_delay_ms(10);

Alternative: Tie the RESET-Pin of the AD9834 permanently to GND. Notable that also a software rest is possible, but I prefer the hardware method.

By set_frequency(Value) you can start using this DDS.

73 de Peter (DK7IH)

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A compact project: The “Micro42” – Another “shirt pocket” SSB transceiver.

The Micro42 - A really pocket sized SSB QRP transceiver for 7MHz

Having deferred the work on the “micro multibander” for some time I finished another small QRP rig (this one for 7MHz) that is suitable for my summer excursions by bike or hiking the local mountains here in the State of Rhineland-Palatinate or the Black Forest that is not that far away on the other side of the Rhine valley.

Besides, this transceiver to be discussed here is some sort of a “remake” of a 20 meter rig I built 3 years before. And this time, the transceiver really fits into a shirt pocket without having to wear “XXXXL”- clothing. ;-):

The Micro42 - A really shirt pocket sized QRP SSB transceiver
The Micro42 – A really shirt pocket sized QRP SSB transceiver (this is my work shirt, so don’t mind the stains! 😉 )

General circuit description (instead of presenting a block diagram)

The rig uses two mixers NE602 plus one filter as central elements. The signal way is reversed when switching from receive to trasmit mode. This is done by 2 relays and is a well known technique for simple QRP rigs. You will find lots of equivalent ideas on the internet (Example 1, Example 2).

But not to ignore the shortcomings of these designs: They are somehow inferior to my requirements, particularly concercing receiver performance. I prefer to have higher signal gain and an AGC circuit. AGC for me is a must. But these designs can be expanded easily, so I added an AGC controlled interfrequency amplifier with dual gate MOSFET BF998 into the receiver’s signal path enhancing performance significantly.

Frequency layout

The frequency generation of the superhet transceiver scheme is simple: Again I use one interfrequency (i. e. 9MHz). The VFO is DDS based on AD9835 operating below the desired radio frequency, which means that it is set to the range of about 2 MHz. Due to this low frequency you could replace the DDS by a VFO if you don’t like the relatively complex work with the software programming and microcontroller stuff). A 2MHz VFO can also be made very stable, so this is an alternative not to be ignoered.

Due to the fact that the schematic is not very difficult to analyze you are kindly requested to refer to it for further talking:

Schematic - The Micro42 - A really shirt pocket sized QRP SSB transceiver
Schematic – The Micro42 – A really shirt pocket sized QRP SSB transceiver. Click for full size picture

Circuit description

In the center of the schematic you can see the main elements of the circuit: One SSB filter (9MHz), correctly terminated by 2 resistors of 1k each (to ensure proper filter response curve) and two relays with a double set of switches. These relays reverse the way the signal travels through the filter. The advantage of this: You can use the integrated oscillator of the NE612 controlled by a crystal and a tuning capacitor to set the carrier frequency correctly for the lower sideband because the mixer is used as SSB generator and as product detector in common.

A word on chosing the proper relays: An intense examination of the relays’ data sheet is essential. I built a prototype of this transceiver on a breadboard prior to soldering the components to a veroboard. I found that some SMD relays have signifikant coupling capacities between the unused relay contacts (in the range of some Picofarads). So stray coupling was a severe problem. Later I used some second-hand Teledyne RF relays that I had purchased via ebay two years ago (price originally 50€!) for 1€ each. These relays are absolutely superb!

The receiver

Before we go: In the circuit scheme above I missed out the antenna switch relay because I think every homebrewer knows what to do in this case. 😉 So the receiver’s signal path starts with a band filter for 7MHz consisting of to tuned LC circuits.  The coupling is relatively loose. As coils I use the well known coil formers in TOKO style with 5.5mm outside measure.

Coil data for the 7MHz band pass filter (BPF) is 39 turns primary and 9 turns secondary of 0.1 mm enameled wire. The respective capacitor is 33pF. This is a high L to C ratio which gives you excellent LC quality factor. This is mandatory especially when working on the 40 meter band, because of the strong broadcasters starting from 7.200 kHz intermodulation might be a problem when the receiver is connected to a high gain antenna and broadcasters’ signals might overload the first mixer (remember that NE612 has a relatively low IM3!). If you still should have problems coping with too strong out-of-band signals you can reduce the coupler from 4.7pF down to 2.7pF.

In practical terms I could not detect any unwanted signal products even when using an antenna with high rf output voltage. One reasons for this is, that there is no rf preamplifier for the receiver. This avoids overloading the first mixer generally.

The NE612 has two mixer inputs and two outputs. This makes it very suitable for this sort of radio. In receive mode pin 2 of the right NE612 is used as signal input. VFO signal is fed into pin 6. The resulting mixer products are taken out from pin 4. Next the 9MHz filter follows from right to left.

The 9MHz IF signal then is fed into an IF amplifier. This one is equipped with a dual gate MOSFET (BF998), gain is about 15dB when full AGC voltage is applied wich leads to about 6V by the 1:1 volatge divider in the applied to gate 2 of the MOSFET.

The left NE612 is the product detector. I use the internal oscillator with a 9MHz crsytal and a tuning capacitor here. This saves building an extra oscillator and simplifies the rig again.

One AF low pass filter made of 1k resistor, 100uF rf choke and a 0.1 uF capacitor eliminates high frequency remainders generated by the mixing process.

The audio stages are also made simple: One preamplifier (using bipolar transistor in grounded emmitter circuit) and a final stage with LM386 transform the signal to a level that is sufficient to be fed into a small 8 ohm loudspeaker or a set of standrd MP3-player headphones. Because the rig is very small and there was definetely no space for a loudspeaker I use headphones instead.

Keep an eye on the power supply switching of the two audio stages. The problem was to eliminate the switching click and pops to a minimum and to avoid acoustic feedback when unsing a loudspeaker. So the audio preamp is only connected to DC on receive. When switching to transmit the charged capacitors avoid instant cut off supplying some Milliseconds DC to the amp until significantly discharged. The main amplfier on the other hand is connected to permanent DC supply. So it won’t pop when switching from tx to rx an vice versa but can cause feedback. To avoid feedback a transistor is used to cut the speaker/earphone from the power amplifier.

AGC

AGC is audio derived. A two stage amplifier provides a DC voltage analog to the audio input sginal strength. First amplifier stage is a common emitter bipolar transistor supplying sufficient audio voltage. This voltage is rectified by a two diode circuit letting only the positive halfways pass. You can use silicon diodes (1N1418) oder Schottky diodes here. An electrolytic capacitor (100uF/6V) provides the time constant respectively DC decay once the signal has disappeared. Output of the DC stage is split. The collector is connected to 12V via a 4.7k resistors causing a voltage drop when the transitor’s conductivity increases. The emitter is fed to the ADC of the microcontroller (pin ADC1) causing a proportional voltage to the voltage of the applied audio signal so that on the OLED an S-meter can be displayed.

The transmitter

An electret microphone picks the operator’s voice. The signal output level of these microphones is high enough to drive the left NE612 (which serves as balanced modulator in this case) directly. Signal input for the mixer should be 200mV RMS according to data sheet. An electret produces about 0.5 to 1 V pp if spoken with a decent voice in the distance of some centimeters. So you have more than enough audio signal power for the modulator.

BTW: Carrier suppression of the modulator is excellent. I achieved 56dB without doing anything else!

The resulting DSB signal then is fed into the SSB filter, the SSB signal subsequently is directly sent into the right NE612. A band pass filter for 7 MHz eliminates the unwanted mixer products. You should have 400 to 500 mV pp of rf signal here when the transmitter input is fully driven. I recommend a two-tone test generator to check out the linearity of this and the remaining amplifier stages!

Next parts of the transmitter are a band pass filter (same coils and capacitors like th rx bandpass filter), a preamplifier and a driver. The later should put out about 150 mW into a 50 ohm load. They are made more linear by emitter degeneration (4.7 and 2.2 ohm resistors for predriver and driver) and negative feedback. This helps to ensure that transmitter performance is fine when IMD3 products are concerned even if the main IMD3 problems usually occur in the final stage.

To transfer the rf power into the final stage proper impedance matching is mandatory. Input impedance of the final stage is fairly low (<10ohms), therefore a broadband (down)transformer is used. Data is: Core T37-43, primary 12 turns, secondary 4 turns of 0.4 mm enamled wire.

Last stage is a single ended linear amplifier in AB mode equipped with a 2SC1969 rf power transistor by eleflow.com.

BIAS circuit: The combination of the 1k resistor, a silicon diode (1N4002 or equ.) and a capacitor sets up the correct bias. Bias is fed into the cold end of the input transformer. Quiescant current should be around 40mA. A good thermal contact between the diode and the transistor is recommended. As the transistor gets warmer the diode will increase its conductivity so reducing bias current. This will prevent thermal runaway effectively!

To avoid bulky output transformers the PI-filter (7MHz LPF) is part of the tank circuit of the final amplifier transistor. For this power level this is an acceptable and practical solution because the output impedance of the stage is nearly equivalent to 50 Ohms. A certain mismatch is not a severe problem. DC to the final transistor is applied via an rf choke, for exact data please refer to the schematic!

T2 helps to suppress unwanted signals that I encountered when taking the transmitter from the dummy load test environment to a real antenna. I observed unwanted parasetic oscillation in the range of about 1MHz. T2 has a low reactance for this frequency range thus eliminating the oscillations in a reilable way by short circuiting them towards ground.

Powered with 12.5V DC the transmitter will put out slightly more than 5 watts PEP.

DDS VFO

AD9835 is a simple but well performing 10-bit DDS chip made by Analog Devices (AD). It is controlled via 3 SPI lines transmitting the frequency data. Maximum output frequency is around 16MHz when the chip is clocked with its maximum clock rate of 50 MHz. Oscillator output voltage is some hundred millivolts peak-to-peak, so you can connect the output directly to pin 6 of the NE612 mixer.

Control signals come from an Arduino Pro Mini board. The microcontroller in this module is, if you are an Arduino user, preinstalled with a bootloader program. I overwrote this small portion of code and use the ATMega168, which is the core of the Arduino, in “native” mode. My software is written in C and transferred via “AVR dude” software using the ISP lines MOSI, MISO, SCK and RESET. These lines are not in the schematic, please refor to ATmega168 data sheet. Alternatively you can use, like shown in the schematic, an ATmega168 controller. So you have to de neccessary wiring on your own.

You will find the source code here. I packed it into an Open Document Text File because of problems I encountered when I tried to store the code into this Blogtext. If you need a compiled HEX-file, please feel free to email me!

Display is a very small OLED with 64 by 32 pixels. The OLED is, to my point of view, a little bit noisy. To suppress any rf traveling on VDD line I use an 82 ohm resistor and a set of bypass capacitors of 100uF and 0.1uF capacity closely connected  to the OLED VDD pin to GND.

A low pass filter by the output of the DDS ensures spectral purity and avoids clock oscillator feed through. Remember that if you need another output frequency other than 2 MHz you should redesign the low pass filter.

Frequency control

Tuning is done by a rotary encoder connected to PD5 and PD6 of the microcontroller. I use the pull up resistors internal to the microcontroller, so you won’t see any other things than the mere encoder.

Tunings steps are selected by pushing the encoder knob or another suitable push button. This button is connected to ADC0 in the ATMega168 via a 3.9k resistor. The resulting ADC voltage might be problem because of a certain variation in the values of the pull up resistors that form the second resistor of the voltage divider.  There is an outcommented section in the code that will show you the exact ADC value that has to be typed into the code so that key recognition works exactly.

The button once pushed will increase the tuning step by a certain amount of Hz. Steps are 10, 50, 100 (standard step), 250, 500, 1000 and 5000 Hz in and endlessly revolving chain.  The step will be reset to 100Hz (standard tuning step) by leaving the tuning knob idle for 2 seconds. That’s all with the controls. Very simple, but sufficient.

Practical aspects

The transceiver is constructed on a double sided veroboard with 6 by 8 centimeters area. Components are through hole and SMD where available. The Arduino is mounted to the front panel (another Veroboard carrying the controls etc.) as well as the OLED is. The veroboard is inserted into an aluminium frame connected to the front panel with 4 lateral M2 screws:

Mounting frame - The Micro42 - A really shirt pocket sized QRP SSB transceiver
Mounting frame – The Micro42 – A really shirt pocket sized QRP SSB transceiver

Design hints:

Wiring can be made by using the colored lines stripped from old parallel printer cables. These cables have a diameter of precisely 1mm an fit through the holes of the veroboard excactly.

If you connect any external components that are not on the same veroboard use standard 2.54 mm (0.1″) male and female board connectors! This will make it much easier to dismantle and reassemble the rig in case troubleshooting is neccessary.

Use M2 srews instaed of M3 when building very small rigs like this one!

The reverse side of the main arrangement:

Reverse side of mounting frame - The Micro42 - A really shirt pocket sized QRP SSB transceiverord-and-front-assembled-in-frame-reverse
Reverse side of mounting frame – The Micro42 – A really shirt pocket sized QRP SSB transceiver

Two brass made bends (from the local hardware store and each cut to a length of 8 centimeters) hold the PCB inside the mounting frame. A winding has been cut into the brass to fix the bends with screws in M2.

Final assembly

Together with 2 halves of a bent aluminium cabinet covered with “DC-fix” (a German manufacturer of self-adhesive PVC coating) the final rig looks like that:

The Micro42 - A really pocket sized SSB QRP transceiver for 7MHz
The Micro42 – A really pocket sized SSB QRP transceiver for 7MHz

So, that’s the end of the story so far. Now it’s time for going outdoor and test the rig in field use. 😉

73 and thanks for watching!

Peter (DK7IH)

A Micro Multibander – Step by step (Part III): The Receiver (Overview)

Work is in progress. The recent weeks I finished all the 6 modules that are going to be the receiver:

  • Band pass filter section
  • Relay switches for switching the BPFs
  • RF preamp, RX mixer and IF preamp
  • IF main amp
  • Product detector and AF amp section
  • AGC unit

Mounted together to an aluminium carrier board it looks like this:

Receiver board for Micro Multiband QRP SSB TRX (C) DK7IH 2018
Receiver board for Micro Multiband QRP SSB TRX (C) DK7IH 2018

On the picture the board is not equipped with the neccessary wiring yet to give the reader more sight on the single circuits. Next I will draw a schematic of each board to point out the used circuitry for those who want to build this or a similar receiver.

First test are promising so far, the receiver is sensitive, has a very low noise figure (due to dual gate MOSFETs in the preamp and the two main IF amp stages) and has shown no problems to cope with high out-of-band broadcaster signals on the 40 meter band which is due to the SBL-3 mixer I have used that has a good IM3 performance..

Thanks for watching an 73 de Peter (DK7IH)

A very compact SSB transceiver for 40 Meters with 50 watts of output power (Overview and block diagram)

In my last article I talked about my ideas fo a new transceiver project beyond the QRP level. First pictures of cicuitry were also shown. In the meanwhile the transceiver has been finished, some minor changes had to be made and now it’s time to go to the details.

All construction objectives (compact size, sufficient output power to establish even DX contacts on 40 meters, good stability, good receive performance, rigidness for outdoor use) have been met so far as I can say. I had the rig with me, when I was on vacation on the Island of Jersey (GJ/DK7IH/P) from 12th to 19th of August this year. It was big fun operating the rig. Lots of stations were calling during the two days when I was on 40 meters. ODX was HL1AHS, OM Kun from Seoul. So, this was very nice for 50 watts and a vertical antenna made of a fishing rod.

First, to give an overview, let’s have a look on the completed transceiver. Cabinet size is 7.5 x 16 x 6 centimeters.

SSB transceiver for 40 Meters with 50 Watts of output
SSB transceiver for 40 Meters with 50 Watts of output
SSB transceiver for 40 Meters with 50 Watts of output
SSB transceiver for 40 Meters with 50 Watts of output power (by DK7IH)

As you can see, the rig is very compact in size. The block diagram gives you an overview what is inside. Receiver section is on top, DDS can be found in the center and the transmitter is sited at the bottom of the diagram. As you can see, it’s again not rocket science and SDR-virus could not strike as well. 😉

SSB transceiver for 40 Meters with 50 Watts of output (Block diagram)
SSB transceiver for 40 Meters with 50 Watts of output (Block diagram)

The next posts will describe the rig in details step by step. Proceed with the receiver’s front end.

73 de Peter

An ultra compact QRO transceiver for 40 Meters with 50 to 70 watts output power

On one hand sunspot cycle is on the decline. Conditions on the higher bands tend to deteriorate gradually. On the other hand I wanted a very compact transceiver for outdoor (particularly holiday) activities. Besides this and due to the fact that I prefer monoband operation when on tour, the potentially ideal band had to be found. Based on these prerequisites I made up my band to go to 40 meters for this project.

Some interesting concepts for QRP-transceivers for this band can be found on the web. The “Santerre” and the “ILER40” should be mentioned. These operate with power levels of about 5 watts which I thought should not be enough in most of the situations. My opinion is, that on 40 meters it’s not the best decision to operate on the standard QRP watt level, e. g. like the mentioned before and my other rigs have been designed for. With high probability you’re about to get lost in the naturally higher band noise and QRM that is around on 7 MHz. Thus, 50 to 70 watts possibly should be a more suitable power level to operate on.

Basic concept

From the electronic point of view this transceiver doesn’t involve very much new stuff. The 4-stage transmitter with push-pull driver and final from my multi-band rig with emitter degeneration circuitry in every stage to improve linearity but without negative feedback in this circuit. Some NE612/SA602-mixers in receiver and transmitter, MC1350 as the rx’s if-amplifier, LM 386 as audio amplifier, busines as usual. DDS with AD 9551 for frequency generation. No fuss, no SDR-stuff. “Old school” homebrewing. Not more, but not less.

The challenge this time was to increase package density once more to an achievable maximum. The maximum size I wanted to have was the size of a carton of cancer sticks, also known as “cigarettes”.

Another problem of the project was to get a high power rf amplifier with an output level very much beyond standard QRP and avoiding any unwanted coupling, parasetic oscillations etc.  even when components are very densly packed. A clean signal is a must, not of the package size.

Construction principles

The center of the construction is made of the aluminium carrier of the 50 to 70 watts final that is in the center of a three layer arrangement consisting of

  • receiver board
  • rf power amplifier
  • rf board with SSB generator, tx mixer, pre-amp, pre-driver and driver (push-pull).

The parts of this assembly:

The main frame carrying all the other stuff:

Dissambled mounting frame of QRP transceiver for 40 meters (2016 by DK7IH)

Dissambled mounting frame of QRP transceiver for 40 meters (2016 by DK7IH)

The aluminium plane centered will keep the PA 50 to 70 watts board. This one is equipped with two MRF455 rf power transistors made by Motorola.

Power amplifier for QRO transceiver 40 meters (by DK7IH)
Power amplifier for QRO transceiver 40 meters (by DK7IH)

Above and below this board the receiver and transmitter boards are mounted to a three layer package.

Receiver board for 40 meter QRO transceiver (by DK7IH)
Receiver board for 40 meter QRO transceiver (by DK7IH)
 Transmitter board for 40 meter QRO transceiver (by DK7IH)

Transmitter board for 40 meter QRO transceiver (by DK7IH)

These 3 boards are stacked and plugged into the front unit that you can see underneath. The front subassembly is formed of

  • the front panel with user controls, microphone socket and LCD
  • the DDS system and
  • the relay switching board.
Front unit of 40 meter QRO transceiver (by DK7IH)
Front unit of 40 meter QRO transceiver (by DK7IH)

Both construction groups are joined in an angle of 90° by a set of plugs and sockets so that they can be put apart easily and fast for service or improvements. All boards are made of 5×7 cm “FR4” material Veroboards.

QRO transceiver for 40 meters fully assembled (by DK7IH)
QRO transceiver for 40 meters fully assembled (by DK7IH)

In the center of the right board package you can see the PA amplifer, capable of delivering 50 to 70 watts SSB signal, on top the rx board, at the bottem the transmitter board.

Thermal considerations

An important issue for a high power transceiver is the transmitter’s final amplifier. Particularly thermal conductivity should be kept in mind. In this case one problem, I thought, might occur because the power transistors are not mounted directly to the rear panel of the transceiver where heat can be lead to the outside easily. Here, the two MRF455s are sited in the center of the sandwich construction holding the 3 main rf boards. But as this transceiver is for voice operation only with its comparatively low duty cycle of 10 to 20%, this was not considered as an unsolvable problem. But thermal aspects must be kept in mind, anyway.

Practical solution

As you can see, the final transmitter stage is based on an aluminium sheet metal of 2 mm thickness. Under the board there is a second layer also of 2 millimiter thickness aluminium. By the rear end it is joined to a solid piece of square shaped aluminium rod that itself is connected to another two thick layers of alumium which are srewed to the rear panel holding a heat sink. For this heat sink I’m currently searching a more massive one.

Practical outcomes

The thermal test was a longer QSO with Dave, M5AFD . During this longer QSO with transmission times of up to 3 to 4 minutes each the center alu panel got a temperature of 60° to 65° centigrade. Thermal stress? Not worth mentioning yet!

Current state

So far I’ve done about 50 QSOs on 40 meters with this rig, gradually improving some things. Later I will publish the detailed scheme as soon as it is finished. By now prospects are good to bring this compact QRO transceiver with me on a holiday trip to Jersey Island planned this summer.

Stay tuned! 73 de Peter (DK7IH)

 

Read next chapter of transceiver description

Improving spurious emissions performance in QRP transceiver DDS VFO: Replacing AD9850 by AD9951

The next step in improving my homemade QRP multiband transceiver was to reconstruct the DDS VFO. This was not urgently neccessary but after some months of continously operating the rig I was not 100%  satisfied with the spurious performance of the AD9850. The AD9850 is a DDS device with only a 10-bit digital-analog-converter (DAC). These ones tend to put out still a quite high number of spurious emissions aka “birdies”.”Birdies” then are detected in the receiver causing unpleasant beep tones.

The AD9951 DDS module (some general information)

Analog Devices (AD) also offers more professional DDS-chips with a better performing 14-bit DAC. The AD9951 is such a device.  It is offered for about 25 USD by mouser.com and other vendors. It is also used in commercial ham band transceivers thus we can deduce that performance is improved compared to the cheaper DDS devices made by AD.

The AD9951 needs multi supply voltages, i. e. 3.3V and 1.8V. Digital inputs are 5V-compatible if 3.3V as D_VDD_IO input voltage is applied. The device can be clocked up to 400Mhz. If you use a clock generator with lower frequency, an internal clock multiplier can be used. But this deteriorates phase noise to a certain degree. For my VFO which works in the range only from 13 to 20 MHz I use a simple standard 5V 120MHz clock generator and I do not use the internal clock multiplier. To make the clock oscillator’s output 1.8V compatible a simple voltage divider has been applied.

Note that performance concerning phase noise of the DDS also depends on the voltage of the clock generator. The lower it is, the more the phase noise performance will deteriorate. To calculate exact configuration of your voltage divider keep in mind that input impedance (1.5 kΩ according to datasheet) and input capacitance (3pF) are paralleled. Input capacitance causes reactance depending on the input frequency given by the following equation:

Output circuit

As usual for me the DDS output consists of a balanced-to-unbalanced broadband transformer followed by an rf amplifier. For the latter one I use the MAV-11 broadband amplifier made by Minicurcuits.

This the circuit of my improved DDS device:

AD9951 based DDS VFO for QRP multiband transceiver (Peter Rachow, DK7IH, 2016)
AD9951 based DDS VFO for QRP multiband transceiver (Peter Rachow, DK7IH, 2016)

Performance

The first impression when I connected the AD9951-DDS to my HP 8558B spectrum analyzer was that the signal looked different compared to a AD9850 generated signal. I’m very sorry, but so far I’ve got no photos but I’m planning an article that will deal with DDS comparisons which will have photos of the spectrographic analysis of the various signals. But it was visible on the first sight, that the signal looked much cleaner than a one produced by a DDS with 10-bit-DAC.

OK, there were much lower sidetones to the main signal on the spectrum analyzer. Measurements are one side of the medal, but how would the DDS perform in the receiver? It approved to have improved when I installed the new DDS into the transceiver and listened to the bands. “Birdies” have vanished to nearly 100%, only some very weak spots are discernable. And the receiver noise also seems to have lowered by a certain degree. But I don’t have measured that so far. Measurements are still to be done. OK, let’s check it out the following days (20 meter is very quiet today!) and then I will be able to say if and how the 14-bit DAC.

So, if you want to get the best performance (low number of spurs, low phase noise) out of the AD9951, here are some basic hints:

  • Stay away far from the Nyquist-Frequency of the chip! Basically this is one third (33%) of the clock rate. I recommend to lower this down to one fifth. So, if you use a clock rate of 100 MHz, don’t let the DDS produce more than 20 MHz!
  • Don’t use the internal clock multiplier! Use a clock generator with the highest possible frequency!
  • Use a clock generator that will put out 1.8 Volts pp!
  • Keep ground leads on your pcb as wide and short as possible!
  • Decouple AVDD, DVDD and DVDD_I/O effectively!
  • Set DAC_RSET to a value that DAC current stays lower than 10mA. 3.9k is a recommended value.

 

Practical implementation

The DDS is mounted to a small piece of veroboard using a 48-lead breakout-board for TQFP48 ICs:

DDS module with AD9951 mounted on a small veroboard (C) DK7IH 2016
DDS module with AD9951 mounted on a small veroboard (C)  DK7IH 2016

Flexible wiring is used to connect the board to the microcontroller. Shielded cable is mandatory for connecting the rf feed to tx and rx mixers.

Underneath you’ll find some code snippets to set the frequency of the AD9951 device. The code has been copied 1 by 1 from my SSB transceiver’s software. Thus modification for your purposes might be neccessary.

After inspiring discussion with a reader of my blog I’ve changed the routines to optimize code concerning performance. The major objective was to avoid intense use of floating point functions because they are slow. Instead I used bitshift operations widely. But there is one floatingpoint calculation left:

fword = (unsigned long) frequency * 35.790648;

The floatingpoint constant 35.790… results from a division of 0xFFFFFFFF by f_clock which is given by the equation of the tuning word (see datasheet of AD9951). This could be converted to a bitshift operation too, if you use a programmable clock oscillator tuned to 134,217,727 Hz. Then the multiplication factor is 32 which can be easily achieved with another bitshift operation.

Thanks for reading!

Peter (DK7IH)

Setting the AD9951’s frequency output

void set_frequency(unsigned long frequency)
{
    //PORT usage
    // FQ_UD:  PD0 (green)
    // DATA:   PD1 (white)
    // CLK:    PD2 (blue)
    // RESET:  PD3 (pink)

    unsigned long fword;
    int t1, shiftbyte = 24, resultbyte;
    unsigned long comparebyte = 0xFF000000;
        
    //Calculate frequency word
    //Clock rate =  120002500
    //0xFFFFFFFF /  120002500 = 35.790....
    fword = (unsigned long) frequency * 35.790648;
   
    //Initiate transfer to DDS
    PORTD &= ~(1); //FQ_UD lo
    //Send instruction bit to set fequency by frequency tuning word
    spi_send_byte(0x04);
   
    //Calculate and transfer the 4 bytes of the tuning word
    //Start with msb
    for(t1 = 0; t1 < 4; t1++)
    {
        resultbyte = (fword & comparebyte) >> shiftbyte;
        comparebyte >>= 8;
        shiftbyte -= 8;       
        spi_send_byte(resultbyte);
    }    
    //End transfer sequence
    PORTD |= 1; //FQ_UD hi
}

//Send one byte to DDS 
void spi_send_byte(int sbyte)
{     
    // PORT usage     
    // FQ_UD:  PD0 (green)     
    // DATA:   PD1 (white)
    // CLK:    PD2 (blue)     
    // RESET:  PD3 (pink)     

    int t1, x = 0x80;          
    for(t1 = 0; t1 < 8; t1++)     
    {         
        //SCLK lo         
        PORTD &= ~(4);          //Bit PB2 set to 0
        //Set respective bit to 0 or 1         
        if(sbyte & x)       
        {
             PORTD |= 2;  //SDATA Bit PB1 set to 1         
        }         
        else         
        {             
             PORTD &= ~(2);  //SDATA Bit PB1 set to 0         
        }
     
        //SCLK line set to 1 // = set clock line to RISING edge to store bit in frequency word         
        PORTD |= 4;  //Bit PB2 set to 1                  
        x >>= 1; //Shift bit to divide x by 2     
    }
}

Resetting the AD9951-chip:

(A reset must be performed once immediately after your program was started and before you

transmit the first instruction to the AD9951 DDS chip)

void reset_ad9951(void)
{
    //PORT usage
    // FQ_UD:  PD0 (green)
    // DATA:   PD1 (white)
    // CLK:    PD2 (blue)
    // RESET:  PD3 (pink)
    PORTD |= 0x08; //Bit PD3 set 
    _delay_ms(1); //Hold reset line hi for at least 20ns. 
     PORTD &amp;= ~(0x08); //Bit PD3 erase 
}

(C) 2016 DK7IH (Peter Rachow)

A 5 band QRP SSB transceiver (construction details)

This is just to illustrate the technical description of my 5 band QRP SSB transceiver with a little more material. I took some pictures of the final assembly of the rig. This is how it looks when put into the cabinet:

Final assembly of the 5 band 10 watts QRP SSB transceiver( (C) 2016 Peter Rachow - DK7IH)
Final assembly of the 5 band 10 watts QRP SSB transceiver( (C) 2016 Peter Rachow – DK7IH)

The front panel labelling is made with a text processor painting the text on a piece of grey paper. After this has been printed the labels are cut out and covered with adhesive tape. The tape is slightly larger than the piece of paper so that it can be used to fix the label to the front panel.

The cabinet is bent of 2 halves of 0.5 mm aluminium sheet metal joint by bolt connectors. As I mentioned before, to keep the rig neat in size I’ve used a sandwich construction that you can see underneath. The transmitter board is on top,

5 band 10 watts QRP SSB transceiver, sandwich construction ( (C) 2016 Peter Rachow - DK7IH)
5 band 10 watts QRP SSB transceiver, sandwich construction ( (C) 2016 Peter Rachow – DK7IH)

the switching board with relays and output low pass filters is centered and the receiver board is sited at the bottom:

Receiver board of 5 band 10 watts QRP SSB transceiver ( (C) 2016 Peter Rachow - DK7IH)
Receiver board of 5 band 10 watts QRP SSB transceiver ( (C) 2016 Peter Rachow – DK7IH)

To make the construction more rigid I’ve inserted 4 threaded bars from the front panel to the rear plate:

Rear view of 5 band 10 watts QRP SSB transceiver ( (C) 2016 Peter Rachow - DK7IH)qrp-ssb-trx-by-dk7ih-peter-rachow-004
Rear view of 5 band 10 watts QRP SSB transceiver

The heat sink is from an old PC where it was used to cool the processor.

The front is a separate unit which holds the microcontroller, the colored display and the DDS unit. This VFO can be seen on the right on the next photo:

5 band 10 watts QRP SSB transceiver ( (C) 2016 Peter Rachow - DK7IH)
5 band 10 watts QRP SSB transceiver ( (C) 2016 Peter Rachow – DK7IH)

So, that’s all so far from the story… 😉

vy 73 de Peter